Novel CMOS RFIC layout generation with concurrent device placement and fixed-length microstrip routing. - Tsun-Ming Tseng; Bing Li 005; Ching-Feng Yeh; Hsiang-Chieh Jhan; Zuo-Min Tsai; Mark Po-Hung Lin; Ulf Schlichtmann (DAC, 2016)

An Efficient Two-Phase ILP-Based Algorithm for Precise CMOS RFIC Layout Generation. - Tsun-Ming Tseng; Bing Li 005; Ching-Feng Yeh; Hsiang-Chieh Jhan; Zuo-Min Tsai; Mark Po-Hung Lin; Ulf Schlichtmann (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)