Physical Infrastructure Assessment for Emergency Medical Response. - Hsiao-Hsuan Liu; Albert Y. Chen; Chun-Yi Dai; Wei-Zen Sun (J. Comput. Civ. Eng., 2015)

Energy-efficient In-Memory Address Calculation. - Amirreza Yousefzadeh; Jan Stuijt; Martijn Hijdra; Hsiao-Hsuan Liu; Anteneh Gebregiorgis; Abhairaj Singh; Said Hamdioui; Francky Catthoor (ACM Trans. Archit. Code Optim., 2022)

Electromigration-aware design technology co-optimization for SRAM in advanced technology nodes. - Mahta Mayahinia; Hsiao-Hsuan Liu; Subrat Mishra; Zsolt Tokei; Francky Catthoor; Mehdi B. Tahoori (DATE, 2023)

Technology/Memory Co-Design and Co-Optimization Using E-Tree Interconnect. - Zhenlin Pei; Mahta Mayahinia; Hsiao-Hsuan Liu; Mehdi B. Tahoori; Francky Catthoor; Zsolt Tokei; Chenyun Pan (ACM Great Lakes Symposium on VLSI, 2023)

Emerging Interconnect Exploration for SRAM Application Using Nonconventional H-Tree and Center-Pin Access. - Zhenlin Pei; Mahta Mayahinia; Hsiao-Hsuan Liu; Mehdi B. Tahoori; Shairfe Muhammad Salahuddin; Francky Catthoor; Zsolt Tokei; Chenyun Pan (ISQED, 2023)

Energy-efficient SNN Architecture using 3nm FinFET Multiport SRAM-based CIM with Online Learning. - Lucas Huijbregts; Hsiao-Hsuan Liu; Paul Detterer; Said Hamdioui; Amirreza Yousefzadeh; Rajendra Bishnoi (DAC, 2024)

Ultra-Scaled E-Tree-Based SRAM Design and Optimization With Interconnect Focus. - Zhenlin Pei; Hsiao-Hsuan Liu; Mahta Mayahinia; Mehdi B. Tahoori; Francky Catthoor; Zsolt Tokei; Dawit Burusie Abdi; James Myers; Chenyun Pan (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Dynamic Segmented Bus for Energy-Efficient Last-Level Cache in Advanced Interconnect-Dominant Nodes. - Mahta Mayahinia; Tommaso Marinelli; Zhenlin Pei; Hsiao-Hsuan Liu; Chenyun Pan; Zsolt Tokei; Francky Catthoor; Mehdi B. Tahoori (IEEE Embed. Syst. Lett., 2024)

Future Design Direction for SRAM Data Array: Hierarchical Subarray With Active Interconnect. - Hsiao-Hsuan Liu; Carlo Gilardi; Shairfe Muhammad Salahuddin; Zhenlin Pei; Pieter Schuddinck; Yang Xiang; Pieter Weckx; Geert Hellings; Marie Garcia Bardon; Julien Ryckaert; Chenyun Pan; Subhasish Mitra; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)