A phase assignment method for virtual-wire-based hardware emulation. - Hsiao-Pin Su; Youn-Long Lin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1997)

Integrating logic retiming and register placement. - Tzu-Chieh Tien; Hsiao-Pin Su; Yu-Wen Tsay; Yih-Chih Chou; Youn-Long Lin (ICCAD, 1998)

Performance-driven soft-macro clustering and placement by preserving HDL design hierarchy. - Hsiao-Pin Su; Allen C.-H. Wu; Youn-Long Lin (ISPD, 1998)

A Timing-Driven Soft-Macro Resynthesis Method in Interaction with Chip Floorplanning. - Hsiao-Pin Su; Allen C.-H. Wu; Youn-Long Lin (DAC, 1999)

A timing-driven soft-macro placement and resynthesis method in interaction with chip floorplanning. - Hsiao-Pin Su; Allen C.-H. Wu; Youn-Long Lin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)