Using a Single Switch with O(M) Inputs/Outputs for the Construction of an Optical Priority Queue with O(M3) Buffer. - Hsien-Chen Chiu; Cheng-Shang Chang; Jay Cheng; Duan-Shin Lee (INFOCOM, 2007)

A simple proof for the constructions of optical priority queues. - Hsien-Chen Chiu; Cheng-Shang Chang; Jay Cheng; Duan-Shin Lee (Queueing Syst. Theory Appl., 2007)

A 1.2V 6.4GHz 181ps 64-bit CD domino adder with DLL measurement technique. - Yu-Shun Wang; Min-Han Hsieh; Chia-Ming Liu; Yi-Chi Wu; Bing-Feng Lin; Hsien-Chen Chiu; Charlie Chung-Ping Chen (ISCAS, 2011)

A 12 Gb/s chip-to-chip AC coupled transceiver. - Yu-Shun Wang; Min-Han Hsieh; Yi-Chi Wu; Chia-Ming Liu; Hsien-Chen Chiu; Bing-Feng Lin; Charlie Chung-Ping Chen (ISCAS, 2011)

Constructions of Optical Priority Queues With Multiple Inputs and Multiple Outputs. - Jay Cheng; Hsien-Chen Chiu; Cheng-Shang Chang; Duan-Shin Lee (IEEE Trans. Inf. Theory, 2011)