Redundancy Testing in Combinational Networks. - Hsien-Hsin S. Lee; Edward S. Davidson (IEEE Trans. Computers, 1974)

A Hierarchical Approach to Modeling and Improving the Performance of Scientific Applications on the KSR1. - Eric L. Boyd; Waqar Azeem; Hsien-Hsin S. Lee; Tien-Pao Shih; Shih-Hao Hung; Edward S. Davidson (ICPP (3), 1994)

Region-based caching: an energy-delay efficient memory architecture for embedded processors. - Hsien-Hsin S. Lee; Gary S. Tyson (CASES, 2000)

Quantifying instruction-level parallelism limits on an EPIC architecture. - Hsien-Hsin S. Lee; Youfeng Wu; Gary S. Tyson (ISPASS, 2000)

Eager writeback - a technique for improving bandwidth utilization. - Hsien-Hsin S. Lee; Gary S. Tyson; Matthew K. Farrens (MICRO, 2000)

Stack Value File: Custom Microarchitecture for the Stack. - Hsien-Hsin S. Lee; Mikhail Smelyanskiy; Chris J. Newburn; Gary S. Tyson (HPCA, 2001)

Improving Bandwidth Utilization using Eager Writeback. - Hsien-Hsin S. Lee; Gary S. Tyson; Matthew K. Farrens (J. Instr. Level Parallelism, 2001)

Improving energy and performance of data cache architectures by exploiting memory reference characteristics. - Hsien-Hsin S. Lee (2001)

Predicate-Aware Scheduling: A Technique for Reducing Resource Constraints. - Mikhail Smelyanskiy; Scott A. Mahlke; Edward S. Davidson; Hsien-Hsin S. Lee (CGO, 2003)

Algorithm for Achieving Minimum Energy Consumption in CMOS Circuits Using Multiple Supply and Threshold Voltages at the Module Level. - Yuvraj Singh Dhillon; Abdulkadir Utku Diril; Abhijit Chatterjee; Hsien-Hsin S. Lee (ICCAD, 2003)

A Hardware-based Cache Pollution Filtering Mechanism for Aggressive Prefetches. - Xiaotong Zhuang; Hsien-Hsin S. Lee (ICPP, 2003)

Energy efficient D-TLB and data cache using semantic-aware multilateral partitioning. - Hsien-Hsin S. Lee; Chinnakrishnan S. Ballapuram (ISLPED, 2003)

Energy-Efficient Network Memory for Ubiquitous Devices. - Joshua B. Fryman; Chad Huneycutt; Hsien-Hsin S. Lee; Kenneth M. Mackenzie; David E. Schimmel (IEEE Micro, 2003)

Architectural Support for High Speed Protection of Memory Integrity and Confidentiality in Multiprocessor Systems. - Weidong Shi; Hsien-Hsin S. Lee; Mrinmoy Ghosh; Chenghuai Lu (IEEE PACT, 2004)

Choice Predictor for Free. - Mongkol Ekpanyapong; Pinar Korkmaz; Hsien-Hsin S. Lee (Asia-Pacific Computer Systems Architecture Conference, 2004)

Hardware assisted control flow obfuscation for embedded processors. - Xiaotong Zhuang; Tao Zhang 037; Hsien-Hsin S. Lee; Santosh Pande (CASES, 2004)

Profile-guided microarchitectural floorplanning for deep submicron processor design. - Mongkol Ekpanyapong; Jacob R. Minz; Thaisiri Watewai; Hsien-Hsin S. Lee; Sung Kyu Lim (DAC, 2004)

Supporting Cache Coherence in Heterogeneous Multiprocessor Systems. - Taeweon Suh; Douglas M. Blough; Hsien-Hsin S. Lee (DATE, 2004)

Attacks and risk analysis for hardware supported software copy protection systems. - Weidong Shi; Hsien-Hsin S. Lee; Chenghuai Lu; Tao Zhang 037 (Digital Rights Management Workshop, 2004)

CoolPression - a hybrid significance compression technique for reducing energy in caches. - Mrinmoy Ghosh; Weidong Shi; Hsien-Hsin S. Lee (SoCC, 2004)

Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 1. - Taeweon Suh; Hsien-Hsin S. Lee; Douglas M. Blough (IEEE Micro, 2004)

Integrating Cache Coherence Protocols for Heterogeneous Multiprocessor Systems, Part 2. - Taeweon Suh; Hsien-Hsin S. Lee; Douglas M. Blough (IEEE Micro, 2004)

Owl: next generation system monitoring. - Martin Schulz 001; Brian S. White; Sally A. McKee; Hsien-Hsin S. Lee; Jürgen Jeitner (Conf. Computing Frontiers, 2005)

Cache coherence support for non-shared bus architecture on heterogeneous MPSoCs. - Taeweon Suh; Daehyun Kim 001; Hsien-Hsin S. Lee (DAC, 2005)

An Intrusion-Tolerant and Self-Recoverable Network Service System Using A Security Enhanced Chip Multiprocessor. - Weidong Shi; Hsien-Hsin S. Lee; Guofei Gu; Laura Falk; Trevor N. Mudge; Mrinmoy Ghosh (ICAC, 2005)

High Efficiency Counter Mode Security Architecture via Prediction and Precomputation. - Weidong Shi; Hsien-Hsin S. Lee; Mrinmoy Ghosh; Chenghuai Lu; Alexandra Boldyreva (ISCA, 2005)

Wire-driven microarchitectural design space exploration. - Mongkol Ekpanyapong; Chinnakrishnan S. Ballapuram; Sung Kyu Lim; Hsien-Hsin S. Lee (ISCAS (2), 2005)

Synonymous address compaction for energy reduction in data TLB. - Chinnakrishnan S. Ballapuram; Hsien-Hsin S. Lee; Milos Prvulovic (ISLPED, 2005)

Towards the issues in architectural support for protection of software execution. - Weidong Shi; Hsien-Hsin S. Lee; Chenghuai Lu; Mrinmoy Ghosh (SIGARCH Comput. Archit. News, 2005)

A low-cost memory remapping scheme for address bus protection. - Lan Gao; Jun Yang 002; Marek Chrobak; Youtao Zhang; San Nguyen; Hsien-Hsin S. Lee (PACT, 2006)

Efficient System-on-Chip Energy Management with a Segmented Bloom Filter. - Mrinmoy Ghosh; Emre Özer 001; Stuart Biles; Hsien-Hsin S. Lee (ARCS, 2006)

Entropy-based low power data TLB design. - Chinnakrishnan S. Ballapuram; Kiran Puttaswamy; Gabriel H. Loh; Hsien-Hsin S. Lee (CASES, 2006)

Reducing energy of virtual cache synonym lookup using bloom filters. - Dong Hyuk Woo; Mrinmoy Ghosh; Emre Özer 001; Stuart Biles; Hsien-Hsin S. Lee (CASES, 2006)

Microarchitectural floorplanning under performance and thermal tradeoff. - Michael B. Healy; Mario Vittes; Mongkol Ekpanyapong; Chinnakrishnan S. Ballapuram; Sung Kyu Lim; Hsien-Hsin S. Lee; Gabriel H. Loh (DATE, 2006)

A Digital Rights Enabled Graphics Processing System. - Weidong Shi; Hsien-Hsin S. Lee; Richard M. Yoo; Alexandra Boldyreva (Graphics Hardware, 2006)

InfoShield: a security architecture for protecting information usage in memory. - Weidong Shi; Joshua B. Fryman; Guofei Gu; Hsien-Hsin S. Lee; Youtao Zhang; Jun Yang 002 (HPCA, 2006)

Constructing a Non-Linear Model with Neural Networks for Workload Characterization. - Richard M. Yoo; Han Lee; Kingsum Chow; Hsien-Hsin S. Lee (IISWC, 2006)

An Integrated Framework for Dependable and Revivable Architectures Using Multicore Processors. - Weidong Shi; Hsien-Hsin S. Lee; Laura Falk; Mrinmoy Ghosh (ISCA, 2006)

A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable Processor Design. - Fayez Mohamood; Michael B. Healy; Sung Kyu Lim; Hsien-Hsin S. Lee (MICRO, 2006)

Authentication Control Point and Its Implications For Secure Processor Design. - Weidong Shi; Hsien-Hsin S. Lee (MICRO, 2006)

M-TREE: A high efficiency security architecture for protecting integrity and privacy of software. - Chenghuai Lu; Tao Zhang 037; Weidong Shi; Hsien-Hsin S. Lee (J. Parallel Distributed Comput., 2006)

Profile-guided microarchitectural floor planning for deep submicron processor design. - Mongkol Ekpanyapong; Jacob R. Minz; Thaisiri Watewai; Hsien-Hsin S. Lee; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Noise-Direct: A Technique for Power Supply Noise Aware Floorplanning Using Microarchitecture Profiling. - Fayez Mohamood; Michael B. Healy; Sung Kyu Lim; Hsien-Hsin S. Lee (ASP-DAC, 2007)

Accelerating memory decryption and authentication with frequent value prediction. - Weidong Shi; Hsien-Hsin S. Lee (Conf. Computing Frontiers, 2007)

An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems. - Taeweon Suh; Shih-Lien Lu; Hsien-Hsin S. Lee (FPL, 2007)

Optimizing Katsevich image reconstruction algorithm on multicore processors. - Eric Fontaine; Hsien-Hsin S. Lee (ICPADS, 2007)

Virtual Exclusion: An architectural approach to reducing leakage energy in caches for multiprocessor systems. - Mrinmoy Ghosh; Hsien-Hsin S. Lee (ICPADS, 2007)

Hierarchical Means: Single Number Benchmarking with Workload Cluster Analysis. - Richard M. Yoo; Hsien-Hsin S. Lee; Han Lee; Kingsum Chow (IISWC, 2007)

A scanisland based design enabling prebond testability in die-stacked microprocessors. - Dean L. Lewis; Hsien-Hsin S. Lee (ITC, 2007)

Smart Refresh: An Enhanced Memory Controller Design for Reducing Energy in Conventional and 3D Die-Stacked DRAMs. - Mrinmoy Ghosh; Hsien-Hsin S. Lee (MICRO, 2007)

Reducing Cache Pollution via Dynamic Data Prefetch Filtering. - Xiaotong Zhuang; Hsien-Hsin S. Lee (IEEE Trans. Computers, 2007)

Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs. - Michael B. Healy; Mario Vittes; Mongkol Ekpanyapong; Chinnakrishnan S. Ballapuram; Sung Kyu Lim; Hsien-Hsin S. Lee; Gabriel H. Loh (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Memory-Centric Security Architecture. - Weidong Shi; Chenghuai Lu; Hsien-Hsin S. Lee (Trans. High Perform. Embed. Archit. Compil., 2007)

A unified methodology for power supply noise reduction in modern microarchitecture design. - Michael B. Healy; Fayez Mohamood; Hsien-Hsin S. Lee; Sung Kyu Lim (ASP-DAC, 2008)

Exploiting access semantics and program behavior to reduce snoop power in chip multiprocessors. - Chinnakrishnan S. Ballapuram; Ahmad Sharif; Hsien-Hsin S. Lee (ASPLOS, 2008)

Total Recall: A Debugging Framework for GPUs. - Ahmad Sharif; Hsien-Hsin S. Lee (Graphics Hardware, 2008)

SHARK: Architectural support for autonomic protection against stealth by rootkit exploits. - Vikas R. Vasisht; Hsien-Hsin S. Lee (MICRO, 2008)

Improving TLB energy for java applications on JVM. - Chinnakrishnan S. Ballapuram; Hsien-Hsin S. Lee (ICSAMOS, 2008)

Adaptive transaction scheduling for transactional memory systems. - Richard M. Yoo; Hsien-Hsin S. Lee (SPAA, 2008)

Kicking the tires of software transactional memory: why the going gets tough. - Richard M. Yoo; Yang Ni; Adam Welc; Bratin Saha; Ali-Reza Adl-Tabatabai; Hsien-Hsin S. Lee (SPAA, 2008)

Extending Amdahl's Law for Energy-Efficient Computing in the Many-Core Era. - Dong Hyuk Woo; Hsien-Hsin S. Lee (Computer, 2008)

DLL-conscious instruction fetch optimization for SMT processors. - Fayez Mohamood; Mrinmoy Ghosh; Hsien-Hsin S. Lee (J. Syst. Archit., 2008)

POD: A 3D-Integrated Broad-Purpose Acceleration Layer. - Dong Hyuk Woo; Hsien-Hsin S. Lee; Joshua B. Fryman; Allan D. Knies; Marsha Eng (IEEE Micro, 2008)

Architectural evaluation of 3D stacked RRAM caches. - Dean L. Lewis; Hsien-Hsin S. Lee (3DIC, 2009)

Thermal optimization in multi-granularity multi-core floorplanning. - Michael B. Healy; Hsien-Hsin S. Lee; Gabriel H. Loh; Sung Kyu Lim (ASP-DAC, 2009)

Pre-bond testable low-power clock tree design for 3D stacked ICs. - Xin Zhao 001; Dean L. Lewis; Hsien-Hsin S. Lee; Sung Kyu Lim (ICCAD, 2009)

Way guard: a segmented counting bloom filter approach to reducing energy for set-associative caches. - Mrinmoy Ghosh; Emre Özer 001; Simon Ford; Stuart Biles; Hsien-Hsin S. Lee (ISLPED, 2009)

Testing Circuit-Partitioned 3D IC Designs. - Dean L. Lewis; Hsien-Hsin S. Lee (ISVLSI, 2009)

High Performance Non-blocking Switch Design in 3D Die-Stacking Technology. - Dean L. Lewis; Sudhakar Yalamanchili; Hsien-Hsin S. Lee (ISVLSI, 2009)

Test Challenges for 3D Integrated Circuits. - Hsien-Hsin S. Lee; Krishnendu Chakrabarty (IEEE Des. Test Comput., 2009)

PROPHET: goal-oriented provisioning for highly tunable multicore processors in cloud computing. - Dong Hyuk Woo; Hsien-Hsin S. Lee (ACM SIGOPS Oper. Syst. Rev., 2009)

COMPASS: a programmable data prefetcher using idle GPU shaders. - Dong Hyuk Woo; Hsien-Hsin S. Lee (ASPLOS, 2010)

Design and analysis of 3D-MAPS: A many-core 3D processor with stacked memory. - Michael B. Healy; Krit Athikulwongse; Rohan Goel; Mohammad M. Hossain; Dae Hyun Kim 004; Young-Joon Lee; Dean L. Lewis; Tzu-Wei Lin; Chang Liu 034; Moongon Jung; Brian Ouellette; Mohit Pathak; et al. (CICC, 2010)

An optimized 3D-stacked memory architecture by exploiting excessive, high-density TSV bandwidth. - Dong Hyuk Woo; Nak Hee Seong; Dean L. Lewis; Hsien-Hsin S. Lee (HPCA, 2010)

Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. - Nak Hee Seong; Dong Hyuk Woo; Hsien-Hsin S. Lee (ISCA, 2010)

SAFER: Stuck-At-Fault Error Recovery for Memories. - Nak Hee Seong; Dong Hyuk Woo; Vijayalakshmi Srinivasan; Jude A. Rivers; Hsien-Hsin S. Lee (MICRO, 2010)

Architecture/OS Support for Embedded Multi-core Systems. - Sung Woo Chung; Hsien-Hsin S. Lee; Woo Hyong Lee (Comput. J., 2010)

A low-cost memory remapping scheme for address bus protection. - Jun Yang 002; Lan Gao; Youtao Zhang; Marek Chrobak; Hsien-Hsin S. Lee (J. Parallel Distributed Comput., 2010)

Chameleon: Virtualizing idle acceleration cores of a heterogeneous multicore processor for caching and prefetching. - Dong Hyuk Woo; Joshua B. Fryman; Allan D. Knies; Hsien-Hsin S. Lee (ACM Trans. Archit. Code Optim., 2010)

Global Built-In Self-Repair for 3D memories with redundancy sharing and parallel testing. - Xiaodong Wang 020; Dilip P. Vasudevan; Hsien-Hsin S. Lee (3DIC, 2011)

Ally: OS-Transparent Packet Inspection Using Sequestered Cores. - Jen-Cheng Huang; Matteo Monchiero; Yoshio Turner; Hsien-Hsin S. Lee (ANCS, 2011)

Designing 3D test wrappers for pre-bond and post-bond test of 3D embedded cores. - Dean L. Lewis; Shreepad Panth; Xin Zhao 001; Sung Kyu Lim; Hsien-Hsin S. Lee (ICCD, 2011)

Symbiotic Scheduling for Shared Caches in Multi-core Systems Using Memory Footprint Signature. - Mrinmoy Ghosh; Ripal Nathuji; Min Lee; Karsten Schwan; Hsien-Hsin S. Lee (ICPP, 2011)

Using Mathematical Modeling in Provisioning a Heterogeneous Cloud Computing Environment. - Sungkap Yeo; Hsien-Hsin S. Lee (Computer, 2011)

Data Prefetching by Exploiting Global and Local Access Patterns. - Ahmad Sharif; Hsien-Hsin S. Lee (J. Instr. Level Parallelism, 2011)

Security Refresh: Protecting Phase-Change Memory against Malicious Wear Out. - Nak Hee Seong; Dong Hyuk Woo; Hsien-Hsin S. Lee (IEEE Micro, 2011)

Low-Power Clock Tree Design for Pre-Bond Testing of 3-D Stacked ICs. - Xin Zhao 001; Dean L. Lewis; Hsien-Hsin S. Lee; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Integrated microarchitectural floorplanning and run-time controller for inductive noise mitigation. - Michael B. Healy; Fayez Mohamood; Hsien-Hsin S. Lee; Sung Kyu Lim (ACM Trans. Design Autom. Electr. Syst., 2011)

Migration energy-aware workload consolidation in enterprise clouds. - Mohammad M. Hossain; Jen-Cheng Huang; Hsien-Hsin S. Lee (CloudCom, 2012)

Adaptive Dynamic Frequency Scaling for Thermal-Aware 3D Multi-core Processors. - Hong Jun Choi; Young Jin Park; Hsien-Hsin S. Lee; Cheol Hong Kim (ICCSA (4), 2012)

3D-MAPS: 3D Massively parallel processor with stacked memory. - Dae Hyun Kim 004; Krit Athikulwongse; Michael B. Healy; Mohammad M. Hossain; Moongon Jung; Ilya Khorosh; Gokul Kumar; Young-Joon Lee; Dean L. Lewis; Tzu-Wei Lin; Chang Liu 034; Shreepad Panth; et al. (ISSCC, 2012)

SimWare: A Holistic Warehouse-Scale Computer Simulator. - Sungkap Yeo; Hsien-Hsin S. Lee (Computer, 2012)

Reducing False Transactional Conflicts with Speculative Sub-Blocking State - An Empirical Study for ASF Transactional Memory System. - Lifeng Nai; Hsien-Hsin S. Lee (IPDPS Workshops, 2013)

Tri-level-cell phase change memory: toward an efficient and reliable memory system. - Nak Hee Seong; Sungkap Yeo; Hsien-Hsin S. Lee (ISCA, 2013)

The quest for a new dimension of system integration. - Hsien-Hsin Sean Lee (VLSI-DAT, 2013)

An efficient scheduling scheme using estimated execution time for heterogeneous computing systems. - Hong Jun Choi; Dong Oh Son; Seung Gu Kang; Jong-Myon Kim; Hsien-Hsin S. Lee; Cheol Hong Kim (J. Supercomput., 2013)

Pragmatic Integration of an SRAM Row Cache in Heterogeneous 3-D DRAM Architecture Using TSV. - Dong Hyuk Woo; Nak Hee Seong; Hsien-Hsin S. Lee (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Cache-conscious graph collaborative filtering on multi-socket multicore systems. - Lifeng Nai; Yinglong Xia; Ching-Yung Lin; Bo Hong; Hsien-Hsin S. Lee (Conf. Computing Frontiers, 2014)

ATAC: Ambient Temperature-Aware Capping for Power Efficient Datacenters. - Sungkap Yeo; Mohammad M. Hossain; Jen-Cheng Huang; Hsien-Hsin S. Lee (SoCC, 2014)

TBPoint: Reducing Simulation Time for Large-Scale GPGPU Kernels. - Jen-Cheng Huang; Lifeng Nai; Hyesoon Kim; Hsien-Hsin S. Lee (IPDPS, 2014)

GPUMech: GPU Performance Modeling Technique Based on Interval Analysis. - Jen-Cheng Huang; Joo Hwan Lee; Hyesoon Kim; Hsien-Hsin S. Lee (MICRO, 2014)

COMPSAC 2015 Plenary Panel on "Rebooting Computing". - Hsien-Hsin Sean Lee (COMPSAC (Stephen S. Yau Academic Symposium), 2015)

IC design challenges and opportunities for advanced process technology. - Hsien-Hsin S. Lee (VLSI-DAT, 2015)

Design and Analysis of 3D-MAPS (3D Massively Parallel Processor with Stacked Memory). - Daehyun Kim 004; Krit Athikulwongse; Michael B. Healy; Mohammad M. Hossain; Moongon Jung; Ilya Khorosh; Gokul Kumar; Young-Joon Lee; Dean L. Lewis; Tzu-Wei Lin; Chang Liu 034; Shreepad Panth; et al. (IEEE Trans. Computers, 2015)

Fault clustering technique for 3D memory BISR. - Tianjian Li; Yan Han; Xiaoyao Liang; Hsien-Hsin S. Lee; Li Jiang 002 (DATE, 2017)

Automotive Computing. - Hsien-Hsin Sean Lee; Jason Clemons (IEEE Micro, 2018)

The Architectural Implications of Facebook's DNN-based Personalized Recommendation. - Udit Gupta; Xiaodong Wang 020; Maxim Naumov; Carole-Jean Wu; Brandon Reagen; David Brooks 001; Bradford Cottel; Kim M. Hazelwood; Bill Jia; Hsien-Hsin S. Lee; Andrey Malevich; Dheevatsa Mudigere; et al. (CoRR, 2019)

The Architectural Implications of Facebook's DNN-Based Personalized Recommendation. - Udit Gupta; Carole-Jean Wu; Xiaodong Wang 020; Maxim Naumov; Brandon Reagen; David Brooks 001; Bradford Cottel; Kim M. Hazelwood; Mark Hempstead; Bill Jia; Hsien-Hsin S. Lee; Andrey Malevich; et al. (HPCA, 2020)

DeepRecSys: A System for Optimizing End-To-End At-Scale Neural Recommendation Inference. - Udit Gupta; Samuel Hsia; Vikram Saraph; Xiaodong Wang 020; Brandon Reagen; Gu-Yeon Wei; Hsien-Hsin S. Lee; David Brooks 001; Carole-Jean Wu (ISCA, 2020)

RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing. - Liu Ke 001; Udit Gupta; Benjamin Youngjae Cho; David Brooks 001; Vikas Chandra; Utku Diril; Amin Firoozshahian; Kim M. Hazelwood; Bill Jia; Hsien-Hsin S. Lee; Meng Li 004; Bert Maher; et al. (ISCA, 2020)

Cheetah: Optimizations and Methods for PrivacyPreserving Inference via Homomorphic Encryption. - Brandon Reagen; Wooseok Choi; Yeongil Ko; Vincent T. Lee; Gu-Yeon Wei; Hsien-Hsin S. Lee; David Brooks 001 (CoRR, 2020)

Cheetah: Optimizing and Accelerating Homomorphic Encryption for Private Inference. - Brandon Reagen; Wooseok Choi; Yeongil Ko; Vincent T. Lee; Hsien-Hsin S. Lee; Gu-Yeon Wei; David Brooks 001 (HPCA, 2021)

RecPipe: Co-designing Models and Hardware to Jointly Optimize Recommendation Quality and Performance. - Udit Gupta; Samuel Hsia; Jeff Zhang 001; Mark Wilkening; Javin Pombra; Hsien-Hsin Sean Lee; Gu-Yeon Wei; Carole-Jean Wu; David Brooks 001 (MICRO, 2021)

Sustainable AI: Environmental Implications, Challenges and Opportunities. - Carole-Jean Wu; Ramya Raghavendra; Udit Gupta; Bilge Acun; Newsha Ardalani; Kiwan Maeng; Gloria Chang; Fiona Aga Behram; James Huang; Charles Bai; Michael Gschwind; Anurag Gupta; et al. (CoRR, 2021)

SecNDP: Secure Near-Data Processing with Untrusted Memory. - Wenjie Xiong 001; Liu Ke 001; Dimitrije Jankov; Michael Kounavis; Xiaochen Wang; Eric Northup; Jie Amy Yang; Bilge Acun; Carole-Jean Wu; Ping Tak Peter Tang; G. Edward Suh; Xuan Zhang 001; et al. (IACR Cryptol. ePrint Arch., 2021)

Special Issue on Commercial Products 2021. - Hsien-Hsin S. Lee (IEEE Micro, 2021)

Hercules: Heterogeneity-Aware Inference Serving for At-Scale Personalized Recommendation. - Liu Ke 001; Udit Gupta; Mark Hempstead; Carole-Jean Wu; Hsien-Hsin S. Lee; Xuan Zhang 001 (HPCA, 2022)

ACT: designing sustainable computer systems with an architectural carbon modeling tool. - Udit Gupta; Mariam Elgamal; Gage Hills; Gu-Yeon Wei; Hsien-Hsin S. Lee; David Brooks 001; Carole-Jean Wu (ISCA, 2022)

Characterization of MPC-based Private Inference for Transformer-based Models. - Yongqin Wang; G. Edward Suh; Wenjie Xiong 001; Benjamin Lefaudeux; Brian Knott; Murali Annavaram; Hsien-Hsin S. Lee (ISPASS, 2022)

Sustainable AI: Environmental Implications, Challenges and Opportunities. - Carole-Jean Wu; Ramya Raghavendra; Udit Gupta; Bilge Acun; Newsha Ardalani; Kiwan Maeng; Gloria Chang; Fiona Aga Behram; Jinshi Huang; Charles Bai; Michael Gschwind; Anurag Gupta; et al. (MLSys, 2022)

Memory-Oriented Design-Space Exploration of Edge-AI Hardware for XR Applications. - Vivek Parmar; Syed Shakib Sarwar; Ziyun Li; Hsien-Hsin S. Lee; Barbara De Salvo; Manan Suri (CoRR, 2022)

AutoCAT: Reinforcement Learning for Automated Exploration of Cache Timing-Channel Attacks. - Mulong Luo; Wenjie Xiong 001; Geunbae Lee; Yueying Li; Xiaomeng Yang; Amy Zhang 001; Yuandong Tian; Hsien-Hsin S. Lee; G. Edward Suh (CoRR, 2022)

DisaggRec: Architecting Disaggregated Systems for Large-Scale Personalized Recommendation. - Liu Ke 001; Xuan Zhang 001; Benjamin Lee; G. Edward Suh; Hsien-Hsin S. Lee (CoRR, 2022)

Data Leakage via Access Patterns of Sparse Features in Deep Learning-based Recommendation Systems. - Hanieh Hashemi; Wenjie Xiong 001; Liu Ke 001; Kiwan Maeng; Murali Annavaram; G. Edward Suh; Hsien-Hsin S. Lee (CoRR, 2022)

Chasing Carbon: The Elusive Environmental Footprint of Computing. - Udit Gupta; Young Geun Kim 001; Sylvia Lee; Jordan Tse; Hsien-Hsin S. Lee; Gu-Yeon Wei; David Brooks 001; Carole-Jean Wu (IEEE Micro, 2022)

Near-Memory Processing in Action: Accelerating Personalized Recommendation With AxDIMM. - Liu Ke 001; Xuan Zhang 001; Jinin So; Jong-Geon Lee; Shinhaeng Kang; Sukhan Lee 002; Songyi Han; YeonGon Cho; Jin Hyun Kim; Yongsuk Kwon; KyungSoo Kim 003; Jin Jung; et al. (IEEE Micro, 2022)

AutoCAT: Reinforcement Learning for Automated Exploration of Cache-Timing Attacks. - Mulong Luo; Wenjie Xiong 001; Geunbae Lee; Yueying Li; Xiaomeng Yang; Amy Zhang 001; Yuandong Tian; Hsien-Hsin S. Lee; G. Edward Suh (HPCA, 2023)

MACTA: A Multi-agent Reinforcement Learning Approach for Cache Timing Attacks and Detection. - Jiaxun Cui; Xiaomeng Yang; Mulong Luo; Geunbae Lee; Peter Stone 001; Hsien-Hsin S. Lee; Benjamin Lee; G. Edward Suh; Wenjie Xiong 001; Yuandong Tian (ICLR, 2023)

Cocktail Party Attack: Breaking Aggregation-Based Privacy in Federated Learning Using Independent Component Analysis. - Sanjay Kariyappa; Chuan Guo 001; Kiwan Maeng; Wenjie Xiong 001; G. Edward Suh; Moinuddin K. Qureshi; Hsien-Hsin S. Lee (ICML, 2023)

Towards MoE Deployment: Mitigating Inefficiencies in Mixture-of-Expert (MoE) Inference. - Haiyang Huang 003; Newsha Ardalani; Anna Y. Sun; Liu Ke 001; Hsien-Hsin S. Lee; Anjali Sridhar; Shruti Bhosale; Carole-Jean Wu; Benjamin Lee (CoRR, 2023)

Architectural CO2 Footprint Tool: Designing Sustainable Computer Systems With an Architectural Carbon Modeling Tool. - Udit Gupta; Mariam Elgamal; Gage Hills; Gu-Yeon Wei; Hsien-Hsin S. Lee; David Brooks 001; Carole-Jean Wu (IEEE Micro, 2023)

Exploring Memory-Oriented Design Optimization of Edge AI Hardware for Extended Reality Applications. - Vivek Parmar; Syed Shakib Sarwar; Ziyun Li; Hsien-Hsin S. Lee; Barbara De Salvo; Manan Suri (IEEE Micro, 2023)

GPU-based Private Information Retrieval for On-Device Machine Learning Inference. - Maximilian Lam; Jeff Johnson 004; Wenjie Xiong 001; Kiwan Maeng; Udit Gupta; Yang Li 183; Liangzhen Lai; Ilias Leontiadis; Minsoo Rhu; Hsien-Hsin S. Lee; Vijay Janapa Reddi; Gu-Yeon Wei; et al. (ASPLOS (1), 2024)

Toward Efficient Inference for Mixture of Experts. - Haiyang Huang 003; Newsha Ardalani; Anna Y. Sun; Liu Ke 001; Shruti Bhosale; Hsien-Hsin S. Lee; Carole-Jean Wu; Benjamin Lee (NeurIPS, 2024)

Information Flow Control in Machine Learning through Modular Model Architecture. - Trishita Tiwari; Suchin Gururangan; Chuan Guo 001; Weizhe Hua; Sanjay Kariyappa; Udit Gupta; Wenjie Xiong 001; Kiwan Maeng; Hsien-Hsin S. Lee; G. Edward Suh (USENIX Security Symposium, 2024)

Computing With COOL Chips. - Hsien-Hsin S. Lee (IEEE Micro, 2024)

Beyond Wires: The Future of Interconnects. - Hsien-Hsin S. Lee (IEEE Micro, 2024)

An Incoming World of Decoupling Siliconomy. - Hsien-Hsin S. Lee (IEEE Micro, 2024)

Top Picks Ignite Innovation. - Hsien-Hsin S. Lee (IEEE Micro, 2024)

The Path to Powering Intelligence. - Hsien-Hsin S. Lee (IEEE Micro, 2024)

Strategic Pivot of Long-Standing x86 Rivals. - Hsien-Hsin S. Lee (IEEE Micro, 2024)

Rise of the Agentic AI Workforce. - Hsien-Hsin S. Lee (IEEE Micro, 2025)

Taiwan Semiconductor Manufacturing Company's $165 Billion Bet. - Hsien-Hsin S. Lee (IEEE Micro, 2025)

Toward Disaggregated and Heterogenous AI Systems. - Hsien-Hsin S. Lee (IEEE Micro, 2025)

Accelerating Confidential Recommendation Model Inference With Near-Memory Processing. - Wenjie Xiong 001; Liu Ke 001; Maxim Ostapenko; Yongmin Tai; Yeongon Cho; Joon-Ho Song; Jinin So; Kyungsoo Kim 003; Yongsuk Kwon; Jin Jung; Jieun Lee; Byeongho Kim; et al. (IEEE Trans. Dependable Secur. Comput., 2025)