A non-intrusive timing synchronization interface for hardware-assisted HW/SW co-simulation. - Yu-Hung Huang; Yi-Shan Lu; Hsin-I Wu; Ren-Song Tsay (DAC, 2012)

A critical-section-level timing synchronization approach for deterministic multi-core instruction set simulations. - Fan-Wei Yu; Bo-Han Zeng; Yu-Hung Huang; Hsin-I Wu; Che-Rung Lee; Ren-Song Tsay (DATE, 2013)

Automatic timing-coherent transactor generation for mixed-level simulations. - Li-Chun Chen; Hsin-I Wu; Ren-Song Tsay (ASP-DAC, 2015)

RollingLight: Enabling Line-of-Sight Light-to-Camera Communications. - Hui-Yu Lee; Hao-Min Lin; Yu-Lin Wei; Hsin-I Wu; Hsin-Mu Tsai; Kate Ching-Ju Lin (MobiSys, 2015)

Highly Efficient and Effective Approach for Synchronization-Function-Level Parallel Multicore Instruction-Set Simulations. - Jyun-Hao Chang; Hsin-I Wu; Hsien-Lun Pai; Ren-Song Tsay; Wai-Kei Mak (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

An accurate and flexible early memory system power evaluation approach using a microcomponent method. - Chi-Kang Chen; Hsin-I Wu; Chi-Ting Hsiao; Ren-Song Tsay (CODES+ISSS, 2016)

Poster Paper: An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices. - Hsuan-Man Chen; Chi-Kang Chen; Hsin-I Wu; Ren-Song Tsay (ICHI, 2016)

An Accurate Crowdsourcing-Based Adaptive Fall Detection Approach Using Smart Devices. - Hsuan-Man Chen; Chi-Kang Chen; Hsin-I Wu; Ren-Song Tsay (ICHI, 2016)

LiCompass: Extracting orientation from polarized light. - Yu-Lin Wei; Hsin-I Wu; Han-Chung Wang; Hsin-Mu Tsai; Kate Ching-Ju Lin; Rayana Boubezari; Hoa Le Minh; Zabih Ghassemlooy (INFOCOM, 2017)

A highly efficient full-system virtual prototype based on virtualization-assisted approach. - Hsin-I Wu; Chi-Kang Chen; Tsung-Ying Lu; Ren-Song Tsay (DATE, 2018)

A Pipeline-Based Scheduler for Optimizing Latency of Convolution Neural Network Inference over Heterogeneous Multicore Systems. - Hsin-I Wu; Da-Yi Guo; Hsu-Hsun Chin; Ren-Song Tsay (AICAS, 2020)

Designing A Compact Convolutional Neural Network Processor on Embedded FPGAs. - Yin-Chun Ling; Hsu-Hsun Chin; Hsin-I Wu; Ren-Song Tsay (GCAIoT, 2020)

A Heuristic Region-based Concurrency Bug Testing Approach. - Kuo-Cheng Chin; Ren-Song Tsay; Hsin-I Wu (ISPA/BDCloud/SocialCom/SustainCom, 2020)

VIRA: a virtualization assisted deterministic system-level simulations. - Hsin-I Wu; Ren-Song Tsay; Hsu-Hsun Chin (SAC, 2020)

CORONA: A k-COnnected RObust Interconnection Network Generation Algorithm. - Hsin-I Wu; Ren-Song Tsay; Fong-Yuan Chang (VLSI-DAT, 2020)

A Very Compact Embedded CNN Processor Design Based on Logarithmic Computing. - Tsung-Ying Lu; Hsu-Hsun Chin; Hsin-I Wu; Ren-Song Tsay (CoRR, 2020)

A Virtualization-Assisted Full-System Simulation Approach for the Verification of System Intercomponent Interactions. - Hsin-I Wu; Da-Yi Guo; Ren-Song Tsay (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

A High-Performance Adaptive Quantization Approach for Edge CNN Applications. - Hsu-Hsun Chin; Ren-Song Tsay; Hsin-I Wu (CoRR, 2021)

An Effective Parallel Program Debugging Approach Based on Timing Annotation. - Yun Chang; Hsin-I Wu; Ren-Song Tsay (CoRR, 2021)

An Adaptive High-Performance Quantization Approach for Resource-Constrained CNN Inference. - Hsu-Hsun Chin; Ren-Song Tsay; Hsin-I Wu (AICAS, 2022)

Accelerate Large Language Model Inference on Edge TPU with OpenVX framework. - You-En Wu; Hsin-I Wu; Kuo-Cheng Chin; Yi-Chun Yang; Ren-Song Tsay (AICAS, 2024)