DFT and BIST techniques for the future. - Hsin-Po Wang 002; Jon Turino (Asian Test Symposium, 2000)

A Built-in Self-Test and Self-Diagnosis Scheme for Heterogeneous SRAM Clusters. - Chih-Wea Wang; Ruey-Shing Tzeng; Chi-Feng Wu; Chih-Tsun Huang; Cheng-Wen Wu; Shi-Yu Huang; Shyh-Horng Lin; Hsin-Po Wang 002 (Asian Test Symposium, 2001)

A Flexible Logic BIST Scheme and Its Application to SoC Designs. - Xiaoqing Wen; Hsin-Po Wang 002 (Asian Test Symposium, 2001)

Type-matching clock tree for zero skew clock gating. - Chia-Ming Chang 002; Shih-Hsu Huang; Yuan-Kai Ho; Jia-Zong Lin; Hsin-Po Wang 002; Yu-Sheng Lu (DAC, 2008)