Automatic circuit adjustment technique for process sensitivity reduction and yield improvement. - Hsiu-Wen Li; Ren-Hong Fu; Hsin-Yu Luo; Chien-Nan Jimmy Liu (ISCAS, 2010)

Embedded fully self-biased switched-capacitor for energy and area-efficient cholesteric LCD drivers. - Wen-Shen Chou; Po-Hsien Huang; Ming-Yan Fan; Ke-Horng Chen; Kuei-Ann Wen; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; Shih-Ming Wang; Long-Der Chen; Cheng-Chen Yang; et al. (ESSCIRC, 2013)

Switching-based charger with continuously built-in resistor detector (CBIRD) and analog multiplication-division unit (AMDU) for fast charging in Li-Ion battery. - Ruei-Hong Peng; Tsu-Wei Tsai; Ke-Horng Chen; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; Shih-Ming Wang; Long-Der Chen; Cheng-Chen Yang; Jui-Lung Chen (ESSCIRC, 2013)

Single inductor quad output switching converter with priority-scheduled program for fast transient and unlimited-load range in 40nm CMOS technology. - Wei-Chung Chen; Tzu-Chi Huang; Tsu-Wei Tsai; Ruei-Hong Peng; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Li-Ren Huang; Chao-Jen Huang; et al. (ESSCIRC, 2014)

A Class-D amplifier powered by embedded single-inductor bipolar-output power module with low common noise and dynamic voltage boosting technique. - Shin-Hao Chen; Kuei-Liang Lin; Shao Siang Ng; Ke-Horng Chen; Chin-Long Wey; Sheng Kang; Kevin Cheng 002; Li-Ren Huang; Chao-Jen Huang; Hsin-Yu Luo (ESSCIRC, 2014)

A pseudo fixed switching frequency 2kHz/A in optimum on-time control buck converter with predicting correction technique for EMI solution. - Wei-Chung Chen; Kuei-Liang Lin; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; Shih-Ming Wang; et al. (ISCAS, 2014)

A low THD clock-free Class-D audio amplifier with an increased damping resistor and cross offset cancellation technique. - Ying-Wei Chou; Meng-Wei Chien; Shin-Chieh Chen; Ke-Horng Chen; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; Hsin-Yu Luo; et al. (ISCAS, 2014)

A dual-level dual-phase pulse-width modulation class-D amplifier with 0.001% THD, 112 dB SNR. - Shang-Hsien Yang; Yuan-Han Yang; Ke-Horng Chen; Chung-Chih Hung; Chin-Long Wey; Ying-Hsi Lin; Tsung-Yen Tsai; Chen-Chih Huang; Chao-Cheng Lee; Zhih Han Tai; Yi Hsuan Cheng; Chi Chung Tsai; et al. (ISCAS, 2014)

Pseudo-Ramp Current Balance (PRCB) Technique With Offset Cancellation Control (OCC) in Dual-Phase DC-DC Buck Converter. - Yi-Ping Su; Wei-Chung Chen; Yu-Ping Huang; Yu-Huei Lee; Ke-Horng Chen; Hsin-Yu Luo (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Suppressing output overshoot voltage technique with 47.1mW/μs power-recycling rate and 93% peak efficiency DC-DC converter for multi-core processors. - Meng-Wei Chien; Wen-Hau Yang; Ying-Wei Chou; Hsin-Chieh Chen; Wei-Chung Chen; Ke-Horng Chen; Chin-Long Wey; Shin-Chi Lai; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)

120V/ns output slew rate enhancement technique and high voltage clamping circuit in high integrated gate driver for power GaN FETs. - Hsiang-An Yang; Chao-Chang Chiu; Shin-Chi Lai; Jui-Lung Chen; Chih-Wei Chang; Che-Hao Meng; Ke-Horng Chen; Chin-Long Wey; Ying-Hsi Lin; Chao-Cheng Lee; Jian-Ru Lin; Tsung-Yen Tsai; et al. (ESSCIRC, 2015)