A low cost DPA-resistant 8-bit AES core based on ring oscillators. - Hsing-Ping Fu; Ju-Hung Hsiao; Po-Chun Liu; Hsie-Chia Chang; Chen-Yi Lee (VLSI-DAT, 2012)

Efficient Hardware Architecture of ηT Pairing Accelerator Over Characteristic Three. - Szu-Chi Chung; Jing-Yu Wu; Hsing-Ping Fu; Jen-Wei Lee; Hsie-Chia Chang; Chen-Yi Lee (IEEE Trans. Very Large Scale Integr. Syst., 2015)