Improved Deep Neural Network Hardware-Accelerators Based on Non-Volatile-Memory: The Local Gains Technique. - Irem Boybat; Carmelo di Nolfo; Stefano Ambrogio; Martina Bodini; Nathan C. P. Farinha; Robert M. Shelby; Pritish Narayanan; Severin Sidler; Hsinyu Tsai; Yusuf Leblebici; Geoffrey W. Burr (ICRC, 2017)

Neuromorphic devices and architectures for next-generation cognitive computing. - Geoffrey W. Burr; Pritish Narayanan; Robert M. Shelby; Stefano Ambrogio; Hsinyu Tsai; Scott L. Lewis; Kohji Hosokawa (ISCAS, 2017)

Equivalent-accuracy accelerated neural-network training using analogue memory. - Stefano Ambrogio; Pritish Narayanan; Hsinyu Tsai; Robert M. Shelby; Irem Boybat; Carmelo di Nolfo; Severin Sidler; Massimo Giordano; Martina Bodini; Nathan C. P. Farinha; Benjamin Killeen; Christina Cheng; et al. (Nat., 2018)

Analog-to-Digital Conversion With Reconfigurable Function Mapping for Neural Networks Activation Function Acceleration. - Massimo Giordano; Giorgio Cristiano; Koji Ishibashi; Stefano Ambrogio; Hsinyu Tsai; Geoffrey W. Burr; Pritish Narayanan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2019)

AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed. - Hung-Yang Chang; Pritish Narayanan; Scott C. Lewis; Nathan C. P. Farinha; Kohji Hosokawa; Charles Mackin; Hsinyu Tsai; Stefano Ambrogio; An Chen 002; Geoffrey W. Burr (IBM J. Res. Dev., 2019)

Accelerating Deep Neural Networks with Analog Memory Devices. - Stefano Ambrogio; Pritish Narayanan; Hsinyu Tsai; Charles Mackin; Katherine Spoon; An Chen 002; Andrea Fasoli; Alexander M. Friz; Geoffrey W. Burr (AICAS, 2020)

Neuromorphic Computing with Phase Change, Device Reliability, and Variability Challenges. - Charles Mackin; Pritish Narayanan; Stefano Ambrogio; Hsinyu Tsai; Katie Spoon; Andrea Fasoli; An Chen 002; Alexander M. Friz; Robert M. Shelby; Geoffrey W. Burr (IRPS, 2020)

Optimization of Analog Accelerators for Deep Neural Networks Inference. - Andrea Fasoli; Stefano Ambrogio; Pritish Narayanan; Hsinyu Tsai; Charles Mackin; Katherine Spoon; Alexander M. Friz; An Chen 002; Geoffrey W. Burr (ISCAS, 2020)

Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation. - Robert L. Bruce; Syed Ghazi Sarwat; Irem Boybat; Cheng-Wei Cheng; Wanki Kim; S. R. Nandakumar; Charles Mackin; Timothy Philip; Zuoguang Liu; Kevin Brew; Nanbo Gong; Injo Ok; et al. (IRPS, 2021)

Circuit Techniques for Efficient Acceleration of Deep Neural Network Inference with Analog-AI (Invited). - Kohji Hosokawa; Pritish Narayanan; Stefano Ambrogio; Hsinyu Tsai; Charles Mackin; Andrea Fasoli; Alexander M. Friz; An Chen 002; Jose Luquin; Katherine Spoon; Geoffrey W. Burr; Scott C. Lewis (ISCAS, 2021)

Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices. - Katie Spoon; Hsinyu Tsai; An Chen 002; Malte J. Rasch; Stefano Ambrogio; Charles Mackin; Andrea Fasoli; Alexander M. Friz; Pritish Narayanan; Milos Stanisavljevic; Geoffrey W. Burr (Frontiers Comput. Neurosci., 2021)

Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers. - Atsuya Okazaki; Pritish Narayanan; Stefano Ambrogio; Kohji Hosokawa; Hsinyu Tsai; Akiyo Nomura; Takeo Yasuda; Charles Mackin; Alexander M. Friz; Masatoshi Ishii; Yasuteru Kohda; Katie Spoon; et al. (ISCAS, 2022)

AnalogNAS: A Neural Network Design Framework for Accurate Inference with Analog In-Memory Computing. - Hadjer Benmeziane; Corey Lammie; Irem Boybat; Malte J. Rasch; Manuel Le Gallo; Hsinyu Tsai; Ramachandran Muralidhar; Smaïl Niar; Hamza Ouarnoughi; Vijay Narayanan; Abu Sebastian; Kaoutar El Maghraoui (EDGE, 2023)

Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited). - Martin M. Frank; Ning Li; Malte J. Rasch; Shubham Jain; Ching-Tzu Chen; Ramachandran Muralidhar; Jin-Ping Han; Vijay Narayanan; Timothy Philip; Kevin Brew; Andrew Simon; Iqbal Saraf; et al. (IRPS, 2023)

Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural Networks (Invited). - Hsinyu Tsai; Pritish Narayanan; Shubham Jain; Stefano Ambrogio; Kohji Hosokawa; Masatoshi Ishii; Charles Mackin; Ching-Tzu Chen; Atsuya Okazaki; Akiyo Nomura; Irem Boybat; Ramachandran Muralidhar; et al. (ISCAS, 2023)

Phase Change Memory-based Hardware Accelerators for Deep Neural Networks (invited). - Geoffrey W. Burr; Pritish Narayanan; Stefano Ambrogio; Atsuya Okazaki; Hsinyu Tsai; Kohji Hosokawa; Charles Mackin; Akiyo Nomura; Takeo Yasuda; J. Demarest; Kevin Brew; Victor Chan; et al. (VLSI Technology and Circuits, 2023)

Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators. - Malte J. Rasch; Charles Mackin; Manuel Le Gallo; An Chen 002; Andrea Fasoli; Frédéric Odermatt; Ning Li; S. R. Nandakumar; Pritish Narayanan; Hsinyu Tsai; Geoffrey W. Burr; Abu Sebastian; et al. (CoRR, 2023)

Using the IBM Analog In-Memory Hardware Acceleration Kit for Neural Network Training and Inference. - Manuel Le Gallo; Corey Lammie; Julian Büchel; Fabio Carta; Omobayode Fagbohungbe; Charles Mackin; Hsinyu Tsai; Vijay Narayanan; Abu Sebastian; Kaoutar El Maghraoui; Malte J. Rasch (CoRR, 2023)

An analog-AI chip for energy-efficient speech recognition and transcription. - Stefano Ambrogio; Pritish Narayanan; Atsuya Okazaki; Andrea Fasoli; Charles Mackin; Kohji Hosokawa; Akiyo Nomura; Takeo Yasuda; An Chen 002; Alexander M. Friz; Masatoshi Ishii; Jose Luquin; et al. (Nat., 2023)

A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh. - Shubham Jain; Hsinyu Tsai; Ching-Tzu Chen; Ramachandran Muralidhar; Irem Boybat; Martin M. Frank; Stanislaw Wozniak; Milos Stanisavljevic; Praneet Adusumilli; Pritish Narayanan; Kohji Hosokawa; Masatoshi Ishii; et al. (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Pipeline Gradient-based Model Training on Analog In-memory Accelerators. - Zhaoxian Wu; Quan Xiao; Tayfun Gokmen; Hsinyu Tsai; Kaoutar El Maghraoui; Tianyi Chen (CoRR, 2024)

NORA: Noise-Optimized Rescaling of LLMs on Analog Compute-in-Memory Accelerators. - Yayue Hou; Hsinyu Tsai; Kaoutar El Maghraoui; Tayfun Gokmen; Geoffrey W. Burr; Liu Liu (DATE, 2025)

Efficient scaling of large language models with mixture of experts and 3D analog in-memory computing. - Julian Büchel; Athanasios Vasilopoulos; William Andrew Simon; Irem Boybat; Hsinyu Tsai; Geoffrey W. Burr; Hernan Castro; Bill Filipiak; Manuel Le Gallo; Abbas Rahimi; Vijay Narayanan; Abu Sebastian (Nat. Comput. Sci., 2025)

Rapid yet accurate Tile-circuit and device modeling for Analog In-Memory Computing. - Jose Luquin; Charles Mackin; Stefano Ambrogio; An Chen 002; F. Baldi; G. Miralles; Malte J. Rasch; Julian Büchel; M. Lalwani; W. Ponghiran; Paul Solomon; Hsinyu Tsai; et al. (CoRR, 2025)

CiMBA: Accelerating Genome Sequencing Through On-Device Basecalling via Compute-in-Memory. - William Andrew Simon; Irem Boybat; Riselda Kodra; Elena Ferro; Gagandeep Singh 002; Mohammed Alser; Shubham Jain; Hsinyu Tsai; Geoffrey W. Burr; Onur Mutlu; Abu Sebastian (IEEE Trans. Parallel Distributed Syst., 2025)