Leveraging Processor Modeling and Verification for General Hardware Modules. - Yue Xing 001; Huaixi Lu; Aarti Gupta; Sharad Malik (DATE, 2021)

Compositional Verification Using a Formal Component and Interface Specification. - Yue Xing 001; Huaixi Lu; Aarti Gupta; Sharad Malik (ICCAD, 2022)

SoC Protocol Implementation Verification Using Instruction-Level Abstraction Specifications. - Huaixi Lu; Yue Xing 001; Aarti Gupta; Sharad Malik (ACM Trans. Design Autom. Electr. Syst., 2023)

A Two-phase Protocol for Atomic Multi-chain Transactions. - Huaixi Lu; Akshay Jajoo; Kedar S. Namjoshi (DIN@CoNEXT, 2024)

Atomicity and Abstraction for Cross-Blockchain Interactions. - Huaixi Lu; Akshay Jajoo; Kedar S. Namjoshi (CoRR, 2024)

Hierarchical Formal Verification of Hardware. - Huaixi Lu; Yue Xing 001; Aarti Gupta; Sharad Malik (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)