A Hybrid Algorithm for Test Point Selection for Scan-Based BIST. - Huan-Chih Tsai; Kwang-Ting Cheng; Chih-Jen Lin; Sudipta Bhawmik (DAC, 1997)

An almost full-scan BIST solution-higher fault coverage and shorter test application time. - Huan-Chih Tsai; Sudipta Bhawmik; Kwang-Ting Cheng (ITC, 1998)

Efficient test-point selection for scan-based BIST. - Huan-Chih Tsai; Kwang-Ting Cheng; Chih-Jen Lin; Sudipta Bhawmik (IEEE Trans. Very Large Scale Integr. Syst., 1998)

Improving the Test Quality for Scan-Based BIST Using a General Test Application Scheme. - Huan-Chih Tsai; Kwang-Ting Cheng; Sudipta Bhawmik (DAC, 1999)

A testability metric for path delay faults and its application. - Huan-Chih Tsai; Kwang-Ting Cheng; Vishwani D. Agrawal (ASP-DAC, 2000)

Static property checking using ATPG vs. BDD techniques. - Chung-Yang Huang; Bwolen Yang; Huan-Chih Tsai; Kwang-Ting Cheng (ITC, 2000)

On improving test quality of scan-based BIST. - Huan-Chih Tsai; Kwang-Ting Cheng; Sudipta Bhawmik (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)