Resource-Efficient Parallel Tree-Based Join Architecture on FPGA. - Huan Zhang 004; Bei Zhao; Wei-Jun Li 001; Zhen-Guo Ma; Feng Yu 003 (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Sorting Matrix Architecture for Continuous Data Sequences. - Meiting Xue; Huan Zhang 004; Weijun Li 001; Feng Yu 003 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2020)

Dual Cuckoo Filter with a Low False Positive Rate for Deep Packet Inspection. - Yixuan Zhang; Meiting Xue; Huan Zhang 004; Shubiao Liu; Bei Zhao (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2023)

HENCE: Hardware End-to-End Neural Conditional Entropy Encoder for Lossless 3D Medical Image Compression. - Jietao Chen; Qianhao Chen; Huan Zhang 004; Weijie Chen; Wei Luo; Feng Yu 003 (IEEE Access, 2024)