Stack engineering for ReRAM devices performance improvement. - Huaqiang Wu; Xinyi Li; Yue Bai; Ye Zhang; Minghao Wu; Zhiping Yu; He Qian (ISCAS, 2014)

Graphene oxide and TiO2 nano-particle composite based nonvolatile memory. - Hong Chao; Fang-Yuan Yuan; Huaqiang Wu; Ning Deng 008; Zhong-Zhen Yu; Rongshan Wei (NVMTS, 2015)

1S1R device with self-compliance property for high density cross-point memory applications. - Xinyi Li; Huaqiang Wu; Ning Deng 008; He Qian (NVMTS, 2015)

Synaptic learning behaviors achieved by metal ion migration in a Cu/PEDOT: PSS/Ta memristor. - Wenqiang Luo; Fang-Yuan Yuan; Huaqiang Wu; Liyang Pan; Ning Deng 008; Fei Zeng; Rongshan Wei; Xuanjing Cai (NVMTS, 2015)

A 16 Mb RRAM test chip based on analog power system with tunable write pulses. - Xiangchao Ma; Huaqiang Wu; Dong Wu; He Qian (NVMTS, 2015)

Theory study and implementation of configurable ECC on RRAM memory. - Mingqing Wang; Ning Deng 008; Huaqiang Wu; Qian He (NVMTS, 2015)

The effect of variation on neuromorphic network based on 1T1R memristor array. - Peng Yao; Huaqiang Wu; Bin Gao 006; Guo Zhang; He Qian (NVMTS, 2015)

RRAM Cross-Point Arrays. - Huaqiang Wu; Yan Liao; Bin Gao 006; Debanjan Jana; He Qian (3D Flash Memories, 2016)

A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation. - Rui Liu 005; Huaqiang Wu; Yachun Pang; He Qian; Shimeng Yu (HOST, 2016)

Extending 1kb RRAM array from weak PUF to strong PUF by employment of SHA module. - Rui Liu 005; Huaqiang Wu; Yachun Pang; He Qian; Shimeng Yu (AsianHOST, 2017)

A 0.13μm 64Mb HfOx ReRAM using configurable ramped voltage write and low read-disturb sensing techniques for reliability improvement. - Xiaowei Han; Qian Jia; Hongbin Sun 001; Longfei Wang; Huaqiang Wu; Yimao Cai; Feng Zhang 014; Yongyi Xie; Fangxu Dong; Xiaoguang Wang 015; Xiaofei Xue; Li Pang; et al. (CICC, 2017)

Optimization of writing scheme on 1T1R RRAM to achieve both high speed and good uniformity. - Shan Wang; Huaqiang Wu; Bin Gao 006; Ning Deng 008; Dong Wu; He Qian (ESSDERC, 2017)

Neuromorphic Computing based on Resistive RAM. - Zixuan Chen; Huaqiang Wu; Bin Gao 006; Peng Yao; Xinyi Li; He Qian (ACM Great Lakes Symposium on VLSI, 2017)

Circuit design for beyond von Neumann applications using emerging memory: From nonvolatile logics to neuromorphic computing. - Wei-Hao Chen; Win-San Khwa; Jun-Yi Li; Wei-Yu Lin; Huan-Ting Lin; Yongpan Liu; Yu Wang 002; Huaqiang Wu; Huazhong Yang; Meng-Fan Chang (ISQED, 2017)

New structure with SiO2-gate-dielectric select gates in vertical-channel three-dimensional (3D) NAND flash memory. - Bo Wang 067; Bin Gao 006; Huaqiang Wu; He Qian (Microelectron. Reliab., 2017)

Resistive Random Access Memory for Future Information Processing System. - Huaqiang Wu; Xiao Hu Wang; Bin Gao 006; Ning Deng 008; Zhichao Lu; Brent Haukness; Gary Bronner; He Qian (Proc. IEEE, 2017)

R2D2: Runtime reassurance and detection of A2 Trojan. - Yumin Hou; Hu He 001; Kaveh Shamsi; Yier Jin; Dong Wu; Huaqiang Wu (HOST, 2018)

A Novel Graphene Double-Balanced Passive Mixer. - Qi Lu; Hongming Lyu 002; Xiaoming Wu; Huaqiang Wu; He Qian (NEMS, 2018)

Building Towards "Invisible Cloak": Robust Physical Adversarial Attack on YOLO Object Detector. - Darren Yu Yang; Jay Xiong; Xincheng Li; Xu Yan; John Raiti; Yuntao Wang 001; Huaqiang Wu; Zhenyu Zhong (UEMCON, 2018)

Sign backpropagation: An on-chip learning algorithm for analog RRAM neuromorphic computing systems. - Qingtian Zhang; Huaqiang Wu; Peng Yao; Wenqiang Zhang; Bin Gao 006; Ning Deng 008; He Qian (Neural Networks, 2018)

Circuit Design Challenges in Computing-in-Memory for AI Edge Devices. - Xin Si; He Qian; Meng-Fan Chang; Cheng-Xin Xue; Jian-Wei Su; Zhixiao Zhang; Sih-Han Li; Shyh-Shyuan Sheu; Heng-Yuan Lee; Ping-Cheng Chen; Huaqiang Wu (ASICON, 2019)

Design Guidelines of RRAM based Neural-Processing-Unit: A Joint Device-Circuit-Algorithm Analysis. - Wenqiang Zhang; Xiaochen Peng; Huaqiang Wu; Bin Gao 006; Hu He 001; Youhui Zhang; Shimeng Yu; He Qian (DAC, 2019)

Reliability Perspective on Neuromorphic Computing Based on Analog RRAM. - Huaqiang Wu; Meiran Zhao; Yuyi Liu; Peng Yao; Yue Xi; Xinyi Li; Wei Wu; Qingtian Zhang; Jianshi Tang; Bin Gao 006; He Qian (IRPS, 2019)

A Reconfigurable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source With <6×10-6 Native Bit Error Rate. - Yachun Pang; Bin Gao 006; Dong Wu; Shengyu Yi; Qi Liu 010; Wei-Hao Chen; Ting-Wei Chang; Wei-En Lin; Xiaoyu Sun 001; Shimeng Yu; He Qian; Meng-Fan Chang; et al. (ISSCC, 2019)

In situ training of feed-forward and recurrent convolutional memristor networks. - Zhongrui Wang; Can Li; Peng Lin; Mingyi Rao; Yongyang Nie; Wenhao Song; Qinru Qiu; Yunning Li; Peng Yan; John Paul Strachan; Ning Ge 001; Nathan McDonald; et al. (Nat. Mach. Intell., 2019)

On-Chip Analog Trojan Detection Framework for Microprocessor Trustworthiness. - Yumin Hou; Hu He 001; Kaveh Shamsi; Yier Jin; Dong Wu; Huaqiang Wu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

Three-Dimensional nand Flash for Vector-Matrix Multiplication. - Panni Wang; Feng Xu; Bo Wang 067; Bin Gao 006; Huaqiang Wu; He Qian; Shimeng Yu (IEEE Trans. Very Large Scale Integr. Syst., 2019)

33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing. - Qi Liu 010; Bin Gao 006; Peng Yao; Dong Wu; Junren Chen; Yachuan Pang; Wenqiang Zhang; Yan Liao; Cheng-Xin Xue; Wei-Hao Chen; Jianshi Tang; Yu Wang 002; et al. (ISSCC, 2020)

33.1 A 74 TMACS/W CMOS-RRAM Neurosynaptic Core with Dynamically Reconfigurable Dataflow and In-situ Transposable Weights for Probabilistic Graphical Models. - Weier Wan; Rajkumar Kubendran; Sukru Burc Eryilmaz; Wenqiang Zhang; Yan Liao; Dabin Wu; Stephen R. Deiss; Bin Gao 006; Priyanka Raina; Siddharth Joshi 001; Huaqiang Wu; Gert Cauwenberghs; et al. (ISSCC, 2020)

Large-scale neuromorphic optoelectronic computing with a reconfigurable diffractive processing unit. - Tiankuang Zhou; Xing Lin; Jiamin Wu; Yitong Chen; Hao Xie; Yipeng Li; Jintao Fan; Huaqiang Wu; Lu Fang 001; Qionghai Dai (CoRR, 2020)

An On-chip Layer-wise Training Method for RRAM based Computing-in-memory Chips. - Yiwen Geng; Bin Gao 006; Qingtian Zhang; Wenqiang Zhang; Peng Yao; Yue Xi; Yudeng Lin; Junren Chen; Jianshi Tang; Huaqiang Wu; He Qian (DATE, 2021)

Impact of Bottom Electrode Roughness on the Analog Switching Characteristics in Nanoscale RRAM Array. - Wenbin Zhang; Jianshi Tang; Bin Gao 006; Wen Sun; Wei Liu; Kanwen Wang; Wei Wu; He Qian; Huaqiang Wu (DRC, 2021)

HARNS: High-level Architectural Model of RRAM based Computing-in-memory NPU. - Yanhai Jiang; Bin Gao 006; Jianshi Tang; Dabin Wu; Hu He 001; He Qian; Huaqiang Wu (ICTA, 2021)

Recent progress of integrated circuits and optoelectronic chips. - Yue Hao 001; Shuiying Xiang; Genquan Han; Jincheng Zhang; Xiaohua Ma 001; Zhangming Zhu; Xingxing Guo; Yahui Zhang; Yanan Han; Ziwei Song; Yan Liu; Ling Yang 003; et al. (Sci. China Inf. Sci., 2021)

Array-level boosting method with spatial extended allocation to improve the accuracy of memristor based computing-in-memory chips. - Wenqiang Zhang; Bin Gao 006; Peng Yao; Jianshi Tang; He Qian; Huaqiang Wu (Sci. China Inf. Sci., 2021)

Edge AI without Compromise: Efficient, Versatile and Accurate Neurocomputing in Resistive Random-Access Memory. - Weier Wan; Rajkumar Kubendran; Clemens J. S. Schaefer; Sukru Burc Eryilmaz; Wenqiang Zhang; Dabin Wu; Stephen R. Deiss; Priyanka Raina; He Qian; Bin Gao 006; Siddharth Joshi 001; Huaqiang Wu; et al. (CoRR, 2021)

A Highly Reliable RRAM Physically Unclonable Function Utilizing Post-Process Randomness Source. - Bohan Lin; Yachuan Pang; Bin Gao 006; Jianshi Tang; Dong Wu; Ting-Wei Chang; Wei-En Lin; Xiaoyu Sun 001; Shimeng Yu; Meng-Fan Chang; He Qian; Huaqiang Wu (IEEE J. Solid State Circuits, 2021)

In-memory Learning with Analog Resistive Switching Memory: A Review and Perspective. - Yue Xi; Bin Gao 006; Jianshi Tang; An Chen; Meng-Fan Chang; Xiaobo Sharon Hu; Jan Van der Spiegel; He Qian; Huaqiang Wu (Proc. IEEE, 2021)

Diagonal Matrix Regression Layer: Training Neural Networks on Resistive Crossbars With Interconnect Resistance Effect. - Yan Liao; Bin Gao 006; Peng Yao; Wenqiang Zhang; Jianshi Tang; Huaqiang Wu; He Qian (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

A Physical Reservoir Computing Model Based on Volatile Memristor for Temporal Signal Processing. - Xiangpeng Liang; Yanan Zhong; Xinyi Li; Heyi Huang; Tingyu Li; Jianshi Tang; Bin Gao 006; He Qian; Huaqiang Wu; Hadi Heidari (ICECS 2022, 2022)

Improving the accuracy of neural networks in analog computing-in-memory systems by analog weight. - Lingjun Dai; Qingtian Zhang; Huaqiang Wu (ICPR, 2022)

Large-Scale Integrated Flexible Tactile Sensor Array for Sensitive Smart Robotic Touch. - Zhenxuan Zhao; Jianshi Tang; Jian Yuan; Yijun Li; Yuan Dai; Jian Yao; Qingtian Zhang; Sanchuan Ding; Tingyu Li; Ruirui Zhang; Yu Zheng 001; Zhengyou Zhang; et al. (CoRR, 2022)

A compute-in-memory chip based on resistive random-access memory. - Weier Wan; Rajkumar Kubendran; Clemens J. S. Schaefer; Sukru Burc Eryilmaz; Wenqiang Zhang; Dabin Wu; Stephen R. Deiss; Priyanka Raina; He Qian; Bin Gao 006; Siddharth Joshi 001; Huaqiang Wu; et al. (Nat., 2022)

2022 roadmap on neuromorphic devices and applications research in China. - Qing Wan; Changjin Wan; Huaqiang Wu; Yuchao Yang 001; Xiaohe Huang; Peng Zhou 021; Lin Chen; Tian-Yu Wang; Yi Li 049; Kanhao Xue; Yu-Hui He; Xiangshui Miao; et al. (Neuromorph. Comput. Eng., 2022)

A 7.4μJ.ppm2 Resistance Sensor with ±120ppm (3σ) 1-Point-Trimmed Inaccuracy and <4ppm/°C Temperature Drift from -55°C to 125°C. - Sining Pan; Ning Pu; Haiyu Wang; Hanjun Jiang; Zhihua Wang 001; Huaqiang Wu (CICC, 2023)

Impact of Programming Process on Temperature Coefficient in Analog RRAM. - Siyao Yang; Bin Gao 006; Jianshi Tang; Feng Xu; Peng Yao; He Qian; Huaqiang Wu (ICICDT, 2023)

ACCLAIM: An End-to-End SystemC-AMS Simulation Framework for Analog In-Memory-Computing. - Hanwen Gong; Hu He 001; Bin Gao 006; Jianshi Tang; Qingtian Zhang; He Qian; Huaqiang Wu (ICTA, 2023)

Thermal Induced Retention Degradation of RRAM-based Neuromorphic Computing Chips. - Awang Ma; Bin Gao 006; Xing Mou; Peng Yao; Yiwei Du; Jianshi Tang; He Qian; Huaqiang Wu (IRPS, 2023)

A Spatial-Designed Computing-In-Memory Architecture Based on Monolithic 3D Integration for High-Performance Systems. - Jiaming Li; Bin Gao 006; Ruihua Yu; Peng Yao; Jianshi Tang; He Qian; Huaqiang Wu (NANOARCH, 2023)

Monolithic 3D Integration of FeFET, Hybrid CMOS Logic and Analog RRAM Array for Energy-Efficient Reconfigurable Computing-In-Memory Architecture. - Yiwei Du; Jianshi Tang; Yijun Li; Yue Xi; Bin Gao 006; He Qian; Huaqiang Wu (VLSI Technology and Circuits, 2023)

An RRAM retention prediction framework using a convolutional neural network based on relaxation behavior. - Yibei Zhang; Qingtian Zhang; Qi Qin; Wenbin Zhang; Yue Xi; Zhixing Jiang; Jianshi Tang; Bin Gao 006; He Qian; Huaqiang Wu (Neuromorph. Comput. Eng., 2023)

A High-Speed and High-Efficiency Diverse Error Margin Write-Verify Scheme for an RRAM-Based Neuromorphic Hardware Accelerator. - Yudeng Lin; Jianshi Tang; Bin Gao 006; Qi Qin; Qingtian Zhang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

BETTER: Bayesian-Based Training and Lightweight Transfer Architecture for Reliable and High-Speed Memristor Neural Network Deployment. - Yudeng Lin; Jianshi Tang; Bin Gao 006; Qingtian Zhang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Uncertainty quantification via a memristor Bayesian deep neural network for risk-sensitive reinforcement learning. - Yudeng Lin; Qingtian Zhang; Bin Gao 006; Jianshi Tang; Peng Yao; Chongxuan Li; Shiyu Huang 001; Zhengwu Liu; Ying Zhou; Yuyi Liu; Wenqiang Zhang; Jun Zhu 001; et al. (Nat. Mac. Intell., 2023)

A 1-Mb Programming Configurable ReRAM Fully Integrating Into a 32-Bit Microcontroller Unit. - Hanwen Gong; Hu He 001; Bin Gao 006; Jianshi Tang; Jian Yu; Dabin Wu; Junren Chen; Qingtian Zhang; Xing Mou; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Architecture-circuit-technology co-optimization for resistive random access memory-based computation-in-memory chips. - Yuyi Liu; Bin Gao 006; Jianshi Tang; Huaqiang Wu; He Qian (Sci. China Inf. Sci., 2023)

CLEAR: a full-stack chip-in-loop emulator for analog RRAM based computing-in-memory system. - Ruihua Yu; Wenqiang Zhang; Bin Gao 006; Yiwen Geng; Peng Yao; Yuyi Liu; Qingtian Zhang; Jianshi Tang; Dong Wu; Hu He 001; Ning Deng 008; He Qian; et al. (Sci. China Inf. Sci., 2023)

An Error-Free 64KB ReRAM-Based nvSRAM Integrated to a Microcontroller Unit Supporting Real-Time Program Storage and Restoration. - Hanwen Gong; Hu He 001; Liyang Pan; Bin Gao 006; Jianshi Tang; Sining Pan; Jianing Li; Peng Yao; Dabin Wu; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

ANVMP: A 28nm 52.6 μW 1.25pJ/SOP Asynchronous Non- Volatile-Memory-based Computing-In-Memory Neuromorphic Processor for Edge-Al Applications. - Jilin Zhang; Qiumeng Wei; Dexuan Huo; Tao Li; Bin Gao 006; He Qian; Huaqiang Wu; Kea-Tiong Tang; Hong Chen 002 (A-SSCC, 2024)

An Intelligent Memory Architecture with LPDDR4 Extensions for Edge Generative AI Inference. - Zhuodong Kang; Bin Gao 006; Jianshi Tang; He Qian; Huaqiang Wu (ICTA, 2024)

A 3.75Mb Embedded RRAM IP on 40nm High-Voltage CMOS Technology. - Yuan He; Chengxiang Ma; Xiangchao Ma; Yilong Huang; Qianze Zheng; Yue Xi; Qiumeng Wei; Jianing Li; Xiaodong He; Yongqin Wu; Weihai Bu; Kai Zheng; et al. (IMW, 2024)

Statistical Modeling of Time-Dependent Post-Programming Conductance Drift in Analog RRAM. - Ruofei Hu; Jianshi Tang; Yue Xi; Zhixing Jiang; Yuyao Lu; Chengxiang Ma; Junchen Li; Bin Gao 006; He Qian; Huaqiang Wu (IRPS, 2024)

HXNOR-PBNN: A Scalable and Parallel Spintronics Synaptic Architecture for Probabilistic Binary Neural Networks. - Cancheng Xiao; Yuxuan Ma; Dingsong Jiang; Jianle Liu; Bingqian Song; Jianshi Tang; Huaqiang Wu; Tianxiang Nan (ISCAS, 2024)

3.2 A 0.028mm² 32MHz RC Frequency Reference in 0.18μm CMOS with ±900ppm Inaccuracy from -40°C to 125°C and ±1600ppm Inaccuracy After Accelerated Aging. - Sining Pan; Yihang Cheng 003; Guohua Wu; Zhihua Wang 001; Kofi A. A. Makinwa; Huaqiang Wu (ISSCC, 2024)

A Dual-Gate Vertical Channel IGZO Transistor for BEOL Stackable 3D Parallel Integration for Memory and Computing Applications. - Ziyi Liu; Yiwei Du; Renrong Liang; Zhigang Zhang; Liyang Pan; Jianshi Tang; Renrong Liang; Bin Gao 006; Qi Hu; Jun Xu; He Qian; Huaqiang Wu; et al. (VLSI Technology and Circuits, 2024)

Distributed Representations Enable Robust Multi-Timescale Computation in Neuromorphic Hardware. - Madison Cotteret; Hugh Greatorex; Alpha Renner; Junren Chen; Emre Neftci; Huaqiang Wu; Giacomo Indiveri; Martin Ziegler 006; Elisabetta Chicca (CoRR, 2024)

Synergistic Development of Perovskite Memristors and Algorithms for Robust Analog Computing. - Nanyang Ye 001; Qiao Sun; Yifei Wang; Liujia Yang; Jundong Zhou; Lei Wang 029; Guang-Zhong Yang; Xinbing Wang; Chenghu Zhou; Wei Ren; Leilei Gu; Huaqiang Wu; et al. (CoRR, 2024)

Improving model robustness to weight noise via consistency regularization. - Yaoqi Hou; Qingtian Zhang; Namin Wang; Huaqiang Wu (Mach. Learn. Sci. Technol., 2024)

Scaling Limits of Memristor-Based Routers for Asynchronous Neuromorphic Systems. - Junren Chen; Siyao Yang; Huaqiang Wu; Giacomo Indiveri; Melika Payvand (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Industry-Oriented Detection Method of PCBA Defects Using Semantic Segmentation Models. - Yang Li 114; Xiao Wang; Zhifan He; Ze Wang; Ke Cheng; Sanchuan Ding; Yijing Fan; Xiaotao Li; Yawen Niu; Shanpeng Xiao; Zhenqi Hao; Bin Gao 006; et al. (IEEE CAA J. Autom. Sinica, 2024)

A Reconfigurable Computing-in-Memory Accelerator With Dynamic Group-Based Dataflow and Dual-Input Macro Designs. - Pufan Xu; Xing Mou; Bin Gao 006; Qiumeng Wei; Peng Yao; Jianshi Tang; He Qian; Huaqiang Wu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Precision-Adaptive ECC Strategy with Computing Fusion Decoding for Near/In-Memory Computing. - Pufan Xu; Peng Yao; Bin Gao 006; Jianshi Tang; He Qian; Huaqiang Wu (IMW, 2025)

MTVSM-CIM: A Magnified-TMR VC-SOT-MRAM Computing-in-Memory Macro for Edge AI. - Bingqian Song; Cancheng Xiao; Fantao Gao; Jiahao Zhao; Mengzhu Li; Ziwei Han; Jianshi Tang; Huaqiang Wu; Tianxiang Nan (ISCAS, 2025)

28.4 A 143dB-Dynamic-Range 119dB-CMRR Capacitance-to-Digital Converter for High-Resolution Floating-Target Displacement Sensing. - Sining Pan; Xiaolong Zhang; Baoyi Zheng; Yihang Cheng 003; Hui Jiang 007; Huaqiang Wu (ISSCC, 2025)

Deep Bayesian active learning using in-memory computing hardware. - Yudeng Lin; Bin Gao 006; Jianshi Tang; Qingtian Zhang; He Qian; Huaqiang Wu (Nat. Comput. Sci., 2025)

A 0.028-mm2 32 -MHz RC Frequency Reference With an Inaccuracy of ±900 ppm From -40 ∘C to 125 ∘C and ±1600 ppm After Accelerated Aging. - Sining Pan; Yihang Cheng 003; Guohua Wu; Zhihua Wang 001; Kofi A. A. Makinwa; Huaqiang Wu (IEEE J. Solid State Circuits, 2025)