Discrete-time cellular neural networks. - Hubert Harrer; Josef A. Nossek (Int. J. Circuit Theory Appl., 1992)

An analog implementation of discrete-time cellular neural networks. - Hubert Harrer; Josef A. Nossek; Rudolf Stelzl (IEEE Trans. Neural Networks, 1992)

Discrete time cellular neural networks. - Hubert Harrer (Shaker, 1992)

On the convergence of discrete-time neural networks. - Hubert Harrer; Zbigniew Galias; Josef A. Nossek (Int. J. Circuit Theory Appl., 1993)

A Current-Mode DTCNN Universal Chip . - Hubert Harrer; Josef A. Nossek; Tamás Roska; Leon O. Chua (ISCAS, 1994)

First- and second-level packaging for the IBM eServer z900. - Hubert Harrer; Harald Pross; Thomas-Michael Winkel; Wiren Dale Becker; Herb I. Stoller; Masakazu Yamamoto; Shinji Abe; Bruce J. Chamberlin; George A. Katopis (IBM J. Res. Dev., 2002)

First- and second-level packaging of the z990 processor cage. - Thomas-Michael Winkel; Wiren Dale Becker; Hubert Harrer; Harald Pross; Dierk Kaller; Bernd Garben; Bruce J. Chamberlin; Scott A. Kuppinger (IBM J. Res. Dev., 2004)

High-speed interconnect and packaging design of the IBM System z9 processor cage. - Hubert Harrer; Daniel M. Dreps; Thomas-Michael Winkel; Wolfgang Scholz; Bao G. Truong; Andreas Huber; Tingdong Zhou; Kenneth L. Christian; Gary F. Goth (IBM J. Res. Dev., 2007)

Packaging design challenges of the IBM System z10 Enterprise Class server. - Thomas-Michael Winkel; Hubert Harrer; Dierk Kaller; Jochen Supper; Daniel M. Dreps; Kenneth L. Christian; D. Cosmadelis; Tingdong Zhou; Thomas Strach; J. Ludwig; David L. Edwards (IBM J. Res. Dev., 2009)

Electronic packaging of the IBM System z196 enterprise-class server processor cage. - Thomas Strach; Frank E. Bosco; Kenneth L. Christian; Kevin R. Covi; Martin Eckert; Gregory R. Edlund; Roland Frech; Hubert Harrer; Andreas Huber; Dierk Kaller; Martin Kindscher; A. Z. Muszynski; et al. (IBM J. Res. Dev., 2012)

5.5GHz system z microprocessor and multi-chip module. - James D. Warnock; Yuen H. Chan; Hubert Harrer; David L. Rude; Ruchir Puri; Sean M. Carey; Gerard Salem; Guenter Mayer; Yiu-Hing Chan; Mark D. Mayo; Adam Jatkowski; Gerald Strevig; et al. (ISSCC, 2013)

Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module. - James D. Warnock; Yuen H. Chan; Hubert Harrer; Sean M. Carey; Gerard Salem; Doug Malone; Ruchir Puri; Jeffrey A. Zitz; Adam Jatkowski; Gerald Strevig; Ayan Datta; Anne Gattiker; et al. (IEEE J. Solid State Circuits, 2014)

Electronic packaging of the IBM z13 processor drawer. - Wiren Dale Becker; Hubert Harrer; Andreas Huber; W. L. Brodsky; R. Krabbenhoft; M. A. Cracraft; Dierk Kaller; Gregory R. Edlund; Thomas Strach (IBM J. Res. Dev., 2015)

IBM Telum: a 16-Core 5+ GHz DCM. - Ofer Geva; Christopher J. Berry; Robert J. Sonnelitter; David Wolpert 001; Adam Collura; Thomas Strach; Di Phan; Cédric Lichtenau; Alper Buyuktosunoglu; Hubert Harrer; Jeffrey A. Zitz; Chad Marquart; et al. (ISSCC, 2022)