A third-generation SPARC V9 64-b microprocessor. - Raymond A. Heald; Kathirgamar Aingaran; Chaim Amir; Michael Ang; Michael Boland; Pankaj Dixit; Gary Gouldsberry; Dale Greenley; Joel Grinberg; Jason M. Hart; Tim Horel; Wen-Jay Hsu; et al. (IEEE J. Solid State Circuits, 2000)

A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor. - Hugh McIntyre; Dennis Wendell; K. James Lin; P. Kaushik; Suresh Seshadri; Alfred Wang; V. Sundararaman; Ping Wang; Song Kim; Wen-Jay Hsu; Hee-Choul Park; Gideon Levinsky; et al. (IEEE J. Solid State Circuits, 2005)

Design solutions for the Bulldozer 32nm SOI 2-core processor module in an 8-core CPU. - Tim C. Fischer; Srikanth Arekapudi; Eric Busta; Carl Dietz; Michael Golden; Scott Hilker; Aaron Horiuchi; Kevin A. Hurd; Dave Johnson 002; Hugh McIntyre; Samuel Naffziger; James Vinh; et al. (ISSCC, 2011)

Design of the Two-Core x86-64 AMD "Bulldozer" Module in 32 nm SOI CMOS. - Hugh McIntyre; Srikanth Arekapudi; Eric Busta; Timothy C. Fischer; Michael Golden; Aaron Horiuchi; Tom Meneghini; Samuel Naffziger; James Vinh (IEEE J. Solid State Circuits, 2012)

4.8 A 28nm x86 APU optimized for power and area efficiency. - Kathryn Wilcox; David Akeson; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; Sriram Sundaram; Jonathan White (ISSCC, 2015)

Carrizo: A High Performance, Energy Efficient 28 nm APU. - Benjamin Munger; David Akeson; Srikanth Arekapudi; Tom Burd; Harry R. Fair III; Jim Farrell; Dave Johnson 002; Guhan Krishnan; Hugh McIntyre; Edward McLellan; Samuel Naffziger; Russell Schreiber; et al. (IEEE J. Solid State Circuits, 2016)

3.2 Zen: A next-generation high-performance ×86 core. - Teja Singh; Sundar Rangarajan; Deepesh John; Carson Henrion; Shane Southard; Hugh McIntyre; Amy Novak; Stephen Kosonocky; Ravi Jotwani; Alex Schaefer; Edward Chang; Joshua Bell; et al. (ISSCC, 2017)

11.1 AMD InstinctTM MI300 Series Modular Chiplet Package - HPC and AI Accelerator for Exa-Class Systems. - Alan Smith; Eric Chapman; Chintan Patel; Raja Swaminathan; John J. Wuu; Tyrone Huang; Wonjun Jung; Alexander Kaganov; Hugh McIntyre; Ramon Mangaser (ISSCC, 2024)

AMD Instinct™ MI300X Accelerator: Packaging and Architecture Co-Optimization. - Alan Smith 003; Gabriel H. Loh; John J. Wuu; Samuel Naffziger; Tyrone Huang; Hugh McIntyre; Ramon Mangaser; Wonjun Jung; Raja Swaminathan (VLSI Technology and Circuits, 2024)

Interconnect Design for Heterogeneous Integration of Chiplets in the AMD Instinct MI300X Accelerator. - Alan Smith 003; Gabriel H. Loh; Samuel Naffziger; John J. Wuu; Nathan Kalyanasundharam; Eric Chapman; Raja Swaminathan; Tyrone Huang; Wonjun Jung; Alexander Kaganov; Hugh McIntyre; Ramon Mangaser (IEEE Micro, 2025)