The Common Hardware and Software Object Model: CHSOM. - Hugo A. Andrade; Margarida F. Jacome (PDPTA, 2000)

An Automated Mapping of Timed Functional Specification to a Precision Timed Architecture. - Shanna-Shaye Forbes; Hiren D. Patel; Edward A. Lee; Hugo A. Andrade (DS-RT, 2008)

A Rapid Prototyping Tool for Embedded, Real-Time Hierarchical Control Systems. - Ram Rajagopal; Subramanian Ramamoorthy; Lothar Wenzel; Hugo A. Andrade (EURASIP J. Embed. Syst., 2008)

LabVIEW™: A graphical system design environment for adaptive hardware/software systems. - Guoqiang Wang; Hugo A. Andrade (AHS, 2010)

A graphical programming and design environment for FPGA-based hardware. - Guoqiang Wang; Trung N. Tran; Hugo A. Andrade (FPT, 2010)

Correct and non-defensive glue design using abstract models. - Stavros Tripakis; Hugo A. Andrade; Arkadeb Ghosal; Rhishikesh Limaye; Kaushik Ravindran; Guoqiang Wang; Guang Yang; Jacob Kornerup; Ian C. Wong (CODES+ISSS, 2011)

Static dataflow with access patterns: semantics and analysis. - Arkadeb Ghosal; Rhishikesh Limaye; Kaushik Ravindran; Stavros Tripakis; Ankita Prasad; Guoqiang Wang; Trung N. Tran; Hugo A. Andrade (DAC, 2012)

Tools for deploying dataflow models on FPGA targets. - Kaushik Ravindran; Arkadeb Ghosal; Rhishikesh Limaye; Hugo A. Andrade; Alejandro Asenjo; Takao Inoue; Douglas Kim; Ankita Prasad; Trung N. Tran; Mike Trimborn; Guoqiang Wang; Guang Yang (DASIP, 2012)

Analysis techniques for static dataflow models with access patterns. - Kaushik Ravindran; Arkadeb Ghosal; Rhishikesh Limaye; Guoqiang Wang; Guang Yang; Hugo A. Andrade (DASIP, 2012)

A Heterogeneous Architecture for Evaluating Real-Time One-Dimensional Computational Fluid Dynamics on FPGAs. - Isaac Liu; Edward A. Lee; Matthew Viele; Guoqiang Wang; Hugo A. Andrade (FCCM, 2012)

Early timing estimation for system-level design using FPGAs (abstract only). - Hugo A. Andrade; Arkadeb Ghosal; Rhishikesh Limaye; Sadia Malik; Newton Petersen; Kaushik Ravindran; Trung N. Tran; Guoqiang Wang; Guang Yang (FPGA, 2012)

A methodology for the design and deployment of reliable systems on heterogeneous platforms. - Hugo A. Andrade; Arkadeb Ghosal; Kaushik Ravindran; Brian L. Evans (ReConFig, 2012)

Modeling, Analysis, and Implementation of Streaming Applications for Hardware Targets. - Kaushik Ravindran; Arkadeb Ghosal; Rhishikesh Limaye; Douglas Kim; Hugo A. Andrade; Jeff Correll; Jacob Kornerup; Ian C. Wong; Gerald Wang; Guang Yang; Amal Ekbal; Mike Trimborn; et al. (Embedded Systems Development, From Functional Models to Implementations, 2014)

Communication storage optimization for static dataflow with access patterns under periodic scheduling and throughput constraint. - Guoqiang Wang; Randy Allen; Hugo A. Andrade; Alberto L. Sangiovanni-Vincentelli (Comput. Electr. Eng., 2014)

Making FPGAs Accessible to Scientists and Engineers as Domain Expert Software Programmers with LabVIEW. - Hugo A. Andrade; Simon Hogg; Stephan Ahrends (CoRR, 2014)

Towards a reconfigurable distributed testbed to enable advanced research and development of timing and synchronization in cyber-physical systems. - Hugo A. Andrade; Patricia Derler; John C. Eidson; Ya-Shian Li-Baboud; Aviral Shrivastava; Kevin B. Stanton; Marc Weiss (ReConFig, 2015)

Making FPGAs Accessible with LabVIEW. - Hugo A. Andrade; Stephan Ahrends; Simon Hogg (FPGAs for Software Programmers, 2016)

Time in cyber-physical systems. - Aviral Shrivastava; Patricia Derler; Ya-Shian Li-Baboud; Kevin B. Stanton; Mohammad Khayatian; Hugo A. Andrade; Marc Weiss; John C. Eidson; Sundeep Chandhoke (CODES+ISSS, 2016)

Tokens vs. Signals: On Conformance between Formal Models of Dataflow and Hardware. - Stavros Tripakis; Rhishikesh Limaye; Kaushik Ravindran; Guoqiang Wang; Hugo A. Andrade; Arkadeb Ghosal (J. Signal Process. Syst., 2016)

A Testbed to Verify the Timing Behavior of Cyber-Physical Systems: Invited. - Aviral Shrivastava; Mohammadreza Mehrabian; Mohammad Khayatian; Patricia Derler; Hugo A. Andrade; Kevin B. Stanton; Ya-Shian Li-Baboud; Edward R. Griffor; Marc Weiss; John C. Eidson (DAC, 2017)

Timestamp Temporal Logic (TTL) for Testing the Timing of Cyber-Physical Systems. - Mohammadreza Mehrabian; Mohammad Khayatian; Aviral Shrivastava; John C. Eidson; Patricia Derler; Hugo A. Andrade; Ya-Shian Li-Baboud; Edward R. Griffor; Marc Weiss; Kevin B. Stanton (ACM Trans. Embed. Comput. Syst., 2017)

An efficient timestamp-based monitoring approach to test timing constraints of cyber-physical systems. - Mohammadreza Mehrabian; Mohammad Khayatian; Ahmed Mousa; Aviral Shrivastava; Ya-Shian Li-Baboud; Patricia Derler; Edward R. Griffor; Hugo A. Andrade; Marc Weiss; John C. Eidson; Dhananjay M. Anand (DAC, 2018)

Guest Editors' Introduction: Selected Papers from IEEE VLSI Test Symposium. - Peter Marwedel; Tulika Mitra; Martin Edin Grimheden; Hugo A. Andrade (IEEE Des. Test, 2020)

Survey on Education for Cyber-Physical Systems. - Peter Marwedel; Tulika Mitra; Martin Edin Grimheden; Hugo A. Andrade (IEEE Des. Test, 2020)

A run-time verification method with consideration of uncertainties for cyber-physical systems. - Mohammadreza Mehrabian; Mohammad Khayatian; Aviral Shrivastava; Patricia Derler; Hugo A. Andrade (Microprocess. Microsystems, 2023)