Using the abstract interpretation technique for static pointer analysis. - Hugues Cassé; Louis Féraud; Christine Rochange; Pascal Sainrat (SIGARCH Comput. Archit. News, 1999)

Une approche pour réduire la complexité du flot de contrôle dans les programmes C. - Hugues Cassé; Louis Féraud; Christine Rochange; Pascal Sainrat (Tech. Sci. Informatiques, 2002)

PapaBench: a Free Real-Time Benchmark. - Fadia Nemer; Hugues Cassé; Pascal Sainrat; Jean Paul Bahsoun; Marianne De Michiel (WCET, 2006)

Improving the Worst-Case Execution Time Accuracy by Inter-Task Instruction Cache Analysis. - Fadia Nemer; Hugues Cassé; Pascal Sainrat; Ali Awada (SIES, 2007)

Improving the First-Miss Computation in Set-Associative Instruction Caches. - Clément Ballabriga; Hugues Cassé (ECRTS, 2008)

Static Loop Bound Analysis of C Programs Based on Flow Analysis and Abstract Interpretation. - Marianne De Michiel; Armelle Bonenfant; Hugues Cassé; Pascal Sainrat (RTCSA, 2008)

An improved approach for set-associative instruction cache partial analysis. - Clément Ballabriga; Hugues Cassé; Pascal Sainrat (SAC, 2008)

Inter-task WCET computation for a-way instruction caches. - Fadia Nemer; Hugues Cassé; Pascal Sainrat; Jean Paul Bahsoun (SIES, 2008)

Improving the WCET computation time by IPET using control flow graph partitioning. - Clément Ballabriga; Hugues Cassé (WCET, 2008)

WCET 2008 - Report from the Tool Challenge 2008 – 8th Intl. Workshop on Worst-Case Execution Time (WCET) Analysis. - Niklas Holsti; Jan Gustafsson; Guillem Bernat; Clément Ballabriga; Armelle Bonenfant; Roman Bourgade; Hugues Cassé; Daniel Cordes; Albrecht Kadlec; Raimund Kirner; Jens Knoop; Paul Lokuciejewski; et al. (WCET, 2008)

A Generic Framework for Blackbox Components in WCET Computation. - Clément Ballabriga; Hugues Cassé; Marianne De Michiel (WCET, 2009)

Experimentation of WCET computation on both ends of automotive processor range. - Hugues Cassé; Pascal Sainrat; Clément Ballabriga; Marianne De Michiel (EDCC-CARS, 2010)

Partial Flow Analysis with oRange. - Marianne De Michiel; Armelle Bonenfant; Clément Ballabriga; Hugues Cassé (ISoLA (2), 2010)

RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. - Julian Wolf 002; Mike Gerdes 001; Florian Kluge; Sascha Uhrig; Jörg Mische; Stefan Metzlaff; Christine Rochange; Hugues Cassé; Pascal Sainrat; Theo Ungerer (ISORC, 2010)

OTAWA: An Open Toolbox for Adaptive WCET Analysis. - Clément Ballabriga; Hugues Cassé; Christine Rochange; Pascal Sainrat (SEUS, 2010)

A Design Flow for Critical Embedded Systems. - Vincent Lefftz; Jean Bertrand; Hugues Cassé; Christophe Clienti; Philippe Coussy; Laurent Maillet-Contoz; Philippe Mercier; Pierre Moreau; Laurence Pierre; Emmanuel Vaumorin (SIES, 2010)

A framework to experiment optimizations for real-time and embedded software - Hugues Cassé; Karine Heydemann; Haluk Ozaktas; Jonathan Ponroy; Christine Rochange; Olivier Zendra (CoRR, 2010)

Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. - Theo Ungerer; Francisco J. Cazorla; Pascal Sainrat; Guillem Bernat; Zlatko Petrov; Christine Rochange; Eduardo Quiñones; Mike Gerdes 001; Marco Paolieri; Julian Wolf 002; Hugues Cassé; Sascha Uhrig; et al. (IEEE Micro, 2010)

RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. - Julian Wolf 002; Mike Gerdes 001; Florian Kluge; Sascha Uhrig; Jörg Mische; Stefan Metzlaff; Christine Rochange; Hugues Cassé; Pascal Sainrat; Theo Ungerer (Comput. Syst. Sci. Eng., 2011)

Deterministic Execution Model on COTS Hardware. - Frédéric Boniol; Hugues Cassé; Eric Noulard; Claire Pagetti (ARCS, 2012)

FFX: a portable WCET annotation language. - Armelle Bonenfant; Hugues Cassé; Marianne De Michiel; Jens Knoop; Laura Kovács; Jakob Zwirchmayr (RTNS, 2012)

Normalisation of Loops with Covariant Variables. - Marianne De Michiel; Armelle Bonenfant; Hugues Cassé (TAPAS@SAS, 2012)

parMERASA - Multi-core Execution of Parallelised Hard Real-Time Applications Supporting Analysability. - Theo Ungerer; Christian Bradatsch; Mike Gerdes 001; Florian Kluge; Ralf Jahr; Jörg Mische; João Fernandes; Pavel G. Zaykov; Zlatko Petrov; Bert Böddeker; Sebastian Kehr; Hans Regler; et al. (DSD, 2013)

Hardware architecture specification and constraint-based WCET computation. - Hajer Herbegue; Hugues Cassé; Mamoun Filali; Christine Rochange (SIES, 2013)

Multi-architecture Value Analysis for Machine Code. - Hugues Cassé; Florian Birée; Pascal Sainrat (WCET, 2013)

Formal Architecture Specification for Time Analysis. - Hajer Herbegue; Mamoun Filali; Hugues Cassé (ARCS, 2014)

Case study: Performance and WCET analysis for parallelised avionic applications with ODC2. - Arthur Pyka; Pavel G. Zaykov; Hugues Cassé; Haluk Ozaktas; Christine Rochange; Sascha Uhrig (INDIN, 2015)

A Framework to Quantify the Overestimations of Static WCET Analysis. - Hugues Cassé; Haluk Ozaktas; Christine Rochange (WCET, 2015)

Using SMT Solving for the Lookup of Infeasible Paths in Binary Programs. - Jordy Ruiz; Hugues Cassé (WCET, 2015)

Expressing and Exploiting Conflicts over Paths in WCET Analysis. - Vincent Mussot; Jordy Ruiz; Pascal Sotin; Marianne De Michiel; Hugues Cassé (WCET, 2016)

Dynamic Branch Resolution Based on Combined Static Analyses. - Wei-Tsun Sun; Hugues Cassé (WCET, 2016)

Parallelizing Industrial Hard Real-Time Applications for the parMERASA Multicore. - Theo Ungerer; Christian Bradatsch; Martin Frieb; Florian Kluge; Jörg Mische; Alexander Stegmeier; Ralf Jahr; Mike Gerdes 001; Pavel G. Zaykov; Lucie Matusova; Zai Jian Jia Li; Zlatko Petrov; et al. (ACM Trans. Embed. Comput. Syst., 2016)

Working Around Loops for Infeasible Path Detection in Binary Programs. - Jordy Ruiz; Hugues Cassé; Marianne De Michiel (SCAM, 2017)

The W-SEPT Project: Towards Semantic-Aware WCET Estimation. - Claire Maiza; Pascal Raymond; Catherine Parent-Vigouroux; Armelle Bonenfant; Fabienne Carrier; Hugues Cassé; Philippe Cuenot; Denis Claraz; Nicolas Halbwachs; Erwan Jahier; Hanbing Li; Marianne De Michiel; et al. (WCET, 2017)

Reducing Timing Interferences in Real-Time Applications Running on Multicore Architectures. - Thomas Carle; Hugues Cassé (WCET, 2018)

Validating Static WCET Analysis: A Method and Its Application. - Wei-Tsun Sun; Eric Jenn; Hugues Cassé (WCET, 2019)

Improving the Performance of WCET Analysis in the Presence of Variable Latencies. - Zhenyu Bai; Hugues Cassé; Marianne De Michiel; Thomas Carle; Christine Rochange (LCTES, 2020)

Static Extraction of Memory Access Profiles for Multi-core Interference Analysis of Real-Time Tasks. - Thomas Carle; Hugues Cassé (ARCS, 2021)

Data Cache Analysis by Counting Integer Points. - Pascal Sotin; Quentin Vermande; Hugues Cassé (RTNS, 2021)

Speculative Execution and Timing Predictability in an Open Source RISC-V Core. - Alban Gruin; Thomas Carle; Hugues Cassé; Christine Rochange (RTSS, 2021)

A Framework for Calculating WCET Based on Execution Decision Diagrams. - Zhenyu Bai; Hugues Cassé; Marianne De Michiel; Thomas Carle; Christine Rochange (ACM Trans. Embed. Comput. Syst., 2022)

MINOTAuR: A Timing Predictable RISC-V Core Featuring Speculative Execution. - Alban Gruin; Thomas Carle; Christine Rochange; Hugues Cassé; Pascal Sainrat (IEEE Trans. Computers, 2023)

Computing Execution Times With Execution Decision Diagrams in the Presence of Out-of-Order Resources. - Zhenyu Bai; Hugues Cassé; Thomas Carle; Christine Rochange (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

Marmot: Extraction of Fine-Grain Memory Access Profiles for real-time software. - Hector Chabot; Isabelle Puaut; Thomas Carle; Hugues Cassé (RTNS, 2024)