Design of 2?VDD-Tolerant I/O Buffer with Considerations of Gate-Oxide Reliability and Hot-Carrier Degradation. - Hui-Wen Tsai; Ming-Dou Ker (ICECS, 2007)

Design of 2xVDD-tolerant mixed-voltage I/O buffer against gate-oxide reliability and hot-carrier degradation. - Hui-Wen Tsai; Ming-Dou Ker (Microelectron. Reliab., 2010)

Design to suppress return-back leakage current of charge pump circuit in low-voltage CMOS process. - Yi-Hsin Weng; Hui-Wen Tsai; Ming-Dou Ker (Microelectron. Reliab., 2011)

Analysis and solution to overcome EOS failure induced by latchup test in a high-voltage integrated circuits. - Hui-Wen Tsai; Ming-Dou Ker; Yi-Sheng Liu; Ming-Nan Chuang (VLSI-DAT, 2013)

Compensation circuit with additional junction sensor to enhance latchup immunity for CMOS integrated circuits. - Hui-Wen Tsai; Ming-Dou Ker (ECCTD, 2015)