A lean FPGA soft processor built using a DSP block. - Hui Yan Cheah; Suhaib A. Fahmy; Douglas L. Maskell; Chidamber Kulkarni (FPGA, 2012)

iDEA: A DSP block based FPGA soft processor. - Hui Yan Cheah; Suhaib A. Fahmy; Douglas L. Maskell (FPT, 2012)

Iterative floating point computation using FPGA DSP blocks. - Fredrik Brosser; Hui Yan Cheah; Suhaib A. Fahmy (FPL, 2013)

C2FPGA - A dependency-timing graph design methodology. - Sunita Chandrasekaran; Shilpa Shanbagh; Ramkumar Jayaraman; Douglas L. Maskell; Hui Yan Cheah (J. Parallel Distributed Comput., 2013)

Analysis and optimization of a deeply pipelined FPGA soft processor. - Hui Yan Cheah; Suhaib A. Fahmy; Nachiket Kapre (FPT, 2014)

The iDEA DSP Block-Based Soft Processor for FPGAs. - Hui Yan Cheah; Fredrik Brosser; Suhaib A. Fahmy; Douglas L. Maskell (ACM Trans. Reconfigurable Technol. Syst., 2014)

On Data Forwarding in Deeply Pipelined Soft Processors. - Hui Yan Cheah; Suhaib A. Fahmy; Nachiket Kapre (FPGA, 2015)

Accelerating Database Query Processing on OpenCL-based FPGAs (Abstract Only). - Ze-ke Wang; Hui Yan Cheah; Johns Paul; Bingsheng He; Wei Zhang 012 (FPGA, 2016)

Relational query processing on OpenCL-based FPGAs. - Ze-ke Wang; Johns Paul; Hui Yan Cheah; Bingsheng He; Wei Zhang 012 (FPL, 2016)

The iDEA architecture-focused FPGA soft processor - Hui Yan Cheah (2016)