Steep switching tunnel FET: A promise to extend the energy efficient roadmap for post-CMOS digital and analog/RF applications. - Huichu Liu; Suman Datta; Vijaykrishnan Narayanan (ISLPED, 2013)

Tunnel FET-based ultra-low power, high-sensitivity UHF RFID rectifier. - Huichu Liu; Ramesh Vaddi; Suman Datta; Vijaykrishnan Narayanan (ISLPED, 2013)

Evaluation of tunnel FET-based flip-flop designs for low power, high performance applications. - Matthew Cotter; Huichu Liu; Suman Datta; Vijaykrishnan Narayanan (ISQED, 2013)

Steep Slope Devices: Enabling New Architectural Paradigms. - Karthik Swaminathan; Huichu Liu; Xueqing Li 002; Moon Seok Kim; Jack Sampson; Vijaykrishnan Narayanan (DAC, 2014)

An examination of the architecture and system-level tradeoffs of employing steep slope devices in 3D CMPs. - Karthik Swaminathan; Huichu Liu; Jack Sampson; Vijaykrishnan Narayanan (ISCA, 2014)

Tunnel FET-based ultra-low power, low-noise amplifier design for bio-signal acquisition. - Huichu Liu; Mahsa Shoaran; Xueqing Li 002; Suman Datta; Alexandre Schmid; Vijaykrishnan Narayanan (ISLPED, 2014)

A Low-Voltage Low-Power LC Oscillator Using the Diode-Connected SymFET. - Xueqing Li 002; Wei-Yu Tsai; Huichu Liu; Suman Datta; Vijaykrishnan Narayanan (ISVLSI, 2014)

Independently-Controlled-Gate FinFET 6T SRAM Cell Design for Leakage Current Reduction and Enhanced Read Access Speed. - Kaisheng Ma; Huichu Liu; Yang Xiao 002; Yang Zheng; Xueqing Li 002; Sumeet Kumar Gupta; Yuan Xie 001; Vijaykrishnan Narayanan (ISVLSI, 2014)

Rf-powered systems using steep-slope devices. - Xueqing Li 002; Unsuk Dennis Heo; Kaisheng Ma; Vijaykrishnan Narayanan; Huichu Liu; Suman Datta (NEWCAS, 2014)

Low-power high-speed current mode logic using Tunnel-FETs. - Wei-Yu Tsai; Huichu Liu; Xueqing Li 002; Vijaykrishnan Narayanan (VLSI-SoC, 2014)

Tunnel FET RF Rectifier Design for Energy Harvesting Applications. - Huichu Liu; Xueqing Li 002; Ramesh Vaddi; Kaisheng Ma; Suman Datta; Vijaykrishnan Narayanan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2014)

Tunnel FET technology: A reliability perspective. - Suman Datta; Huichu Liu; Vijaykrishnan Narayanan (Microelectron. Reliab., 2014)

A High-Efficiency Switched-Capacitance HTFET Charge Pump for Low-Input-Voltage Applications. - Unsuk Heo; Xueqing Li 002; Huichu Liu; Sumeet Kumar Gupta; Suman Datta; Vijaykrishnan Narayanan (VLSID, 2015)

Thermal-Aware Application Scheduling on Device-Heterogeneous Embedded Architectures. - Karthik Swaminathan; Jagadish Kotra; Huichu Liu; Jack Sampson; Mahmut T. Kandemir; Vijaykrishnan Narayanan (VLSID, 2015)

Analog Circuit Design Using Tunnel-FETs. - Behnam Sedighi; Xiaobo Sharon Hu; Huichu Liu; Joseph J. Nahas; Michael T. Niemier (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Enabling New Computation Paradigms with HyperFET - An Emerging Device. - Wei-Yu Tsai; Xueqing Li 002; Matthew Jerry; Baihua Xie; Nikhil Shukla; Huichu Liu; Nandhini Chandramoorthy; Matthew Cotter; Arijit Raychowdhury; Donald M. Chiarulli; Steven P. Levitan; Suman Datta; et al. (IEEE Trans. Multi Scale Comput. Syst., 2016)

Exploration of Low-Power High-SFDR Current-Steering D/A Converter Design Using Steep-Slope Heterojunction Tunnel FETs. - Moon Seok Kim; Xueqing Li 002; Huichu Liu; John Sampson; Suman Datta; Vijaykrishnan Narayanan (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Dynamic Power and Energy Management for Energy Harvesting Nonvolatile Processor Systems. - Kaisheng Ma; Xueqing Li 002; Huichu Liu; Xiao Sheng; Yiqun Wang; Karthik Swaminathan; Yongpan Liu; Yuan Xie 001; John Sampson; Vijaykrishnan Narayanan (ACM Trans. Embed. Comput. Syst., 2017)

Density Tradeoffs of Non-Volatile Memory as a Replacement for SRAM Based Last Level Cache. - Kunal Korgaonkar; Ishwar Bhati; Huichu Liu; Jayesh Gaur; Sasikanth Manipatruni; Sreenivas Subramoney; Tanay Karnik; Steven Swanson; Ian Young 001; Hong Wang 003 (ISCA, 2018)

Low-Power, Adaptive Neuromorphic Systems: Recent Progress and Future Directions. - Arindam Basu; Jyotibdha Acharya; Tanay Karnik; Huichu Liu; Hai Helen Li; Jae-sun Seo; Chang Song 001 (IEEE J. Emerg. Sel. Topics Circuits Syst., 2018)

Scalable energy-efficient magnetoelectric spin-orbit logic. - Sasikanth Manipatruni; Dmitri E. Nikonov; Chia-Ching Lin; Tanay A. Gosavi; Huichu Liu; Bhagwati Prasad; Yen-Lin Huang; Everton Bonturim; Ramamoorthy Ramesh; Ian A. Young (Nat., 2019)

F5: Enabling New System Architectures with 2.5D, 3D, and Chiplets. - Christopher Gonzalez; Huichu Liu; Mijung Noh; Eric Karl; Thomas Toifl; Shawn S. H. Hsu (ISSCC, 2021)

SE2: Going Remote: Challenges and Opportunities to Remote Learning, Work, and Collaboration. - Alicia Klinefelter; Huichu Liu; Luca Benini; Yvain Thonnart; Keith A. Bowman; Kathy Wilcox; David Bol; Alvin Loke; Ofer Shacham (ISSCC, 2021)

System-Level Design and Integration of a Prototype AR/VR Hardware Featuring a Custom Low-Power DNN Accelerator Chip in 7nm Technology for Codec Avatars. - Huseyin Ekin Sumbul; Tony F. Wu; Yuecheng Li; Syed Shakib Sarwar; William Koven; Eli Murphy-Trotzky; Xingxing Cai; Elnaz Ansari; Daniel H. Morris; Huichu Liu; Doyun Kim; Edith Beigné (CICC, 2022)

A Uniform Latency Model for DNN Accelerators with Diverse Architectures and Dataflows. - Linyan Mei; Huichu Liu; Tony F. Wu; Huseyin Ekin Sumbul; Marian Verhelst; Edith Beigné (DATE, 2022)

Co-Optimization of SRAM Circuits with Sequential Access Patterns in a 7nm SoC Achieving 58% Memory Energy Reduction for AR Applications. - Daniel H. Morris; Huichu Liu; Tony F. Wu; Huseyin Ekin Sumbul; Elnaz Ansari; Alexandre Barachant; Jonathan Reid; Edith Beigné (VLSI Technology and Circuits, 2022)

Three-Dimensional Stacked Neural Network Accelerator Architectures for AR/VR Applications. - Lita Yang; Robert M. Radway; Yu-Hsin Chen; Tony F. Wu; Huichu Liu; Elnaz Ansari; Vikas Chandra; Subhasish Mitra; Edith Beigné (IEEE Micro, 2022)

11.2 A 3D integrated Prototype System-on-Chip for Augmented Reality Applications Using Face-to-Face Wafer Bonded 7nm Logic at <2μm Pitch with up to 40% Energy Reduction at Iso-Area Footprint. - Tony F. Wu; Huichu Liu; Huseyin Ekin Sumbul; Lita Yang; Dipti Baheti; Jeremy Coriell; William Koven; Anu Krishnan; Mohit Mittal; Matheus Trevisan Moreira; Max Waugaman; Laurent Ye; et al. (ISSCC, 2024)

Characterization and Design of 3D-Stacked Memory for Image Signal Processing on AR/VR Devices. - Lita Yang; Changjung Kao; Sriseshan Srikanth; Huseyin Ekin Sumbul; Tony F. Wu; Huichu Liu; Edith Beigné (MEMSYS, 2024)

A 3D Design Methodology for Integrated Wearable SoCs: Enabling Energy Efficiency and Enhanced Performance at Iso-Area Footprint. - Huseyin Ekin Sumbul; Arne Symons; Lita Yang; Huichu Liu; Tony F. Wu; Matheus Trevisan Moreira; Debabrata Mohapatra; Abhinav Agarwal; Kaushik Ravindran; Chris Thompson; Yuecheng Li; Edith Beigné (DATE, 2025)