A two-port SRAM using a single-port cell array with a self-timed write-after-read control scheme to save 47% area & 63% standby power. - Fujun Bai; Baoyu Xiong; Xiaofei Xue; Weizhe Song; Baofeng Wu; Ni Fu; Bing Yu; Huifu Duan; Xiaowei Han; Alessandro Minzoni; Qiwei Ren (ASICON, 2017)

Hf0.5Zr0.5O2 1T-1C FeRAM arrays with excellent endurance performance for embedded memory. - Wenwu Xiao; Yue Peng; Yan Liu; Huifu Duan; Fujun Bai; Bing Yu; Qiwei Ren; Xiao Yu; Genquan Han (Sci. China Inf. Sci., 2023)