An Efficient Asynchronous Circuits Design Flow with Backward Delay Propagation Constraint. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (DATE, 2024)

Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

LAC: A Novel Lightweight Asynchronous Controller With Optimized Phase Shift. - Huiyao Wang; Shanlin Xiao; Lingfeng Zhou; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Toward Efficient Asynchronous Circuits Design Flow Using Backward Delay Propagation Constraint. - Lingfeng Zhou; Shanlin Xiao; Huiyao Wang; Jinghai Wang; Zeyang Xu; Bohan Wang; Zhiyi Yu (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Simulating Dual-Process Thinking in Dialogue Topic Shift Detection. - Huiyao Wang; Peifeng Li; Yaxin Fan; Qiaoming Zhu (COLING, 2025)

A Time-Borrowing Method for High-Performance Bundled-Data Asynchronous Circuits. - Bohan Wang; Zeyang Xu; Lingfeng Zhou; Huiyao Wang; Jinghai Wang; Zhiyi Yu; Shanlin Xiao (ISQED, 2025)