Heterogeneous B∗-trees for analog placement with symmetry and regularity considerations. - Pang-Yen Chou; Hung-Chih Ou; Yao-Wen Chang (ICCAD, 2011)

Non-uniform multilevel analog routing with matching constraints. - Hung-Chih Ou; Hsing-Chih Chang Chien; Yao-Wen Chang (DAC, 2012)

Double patterning lithography-aware analog placement. - Hsing-Chih Chang Chien; Hung-Chih Ou; Tung-Chieh Chen; Ta-Yu Kuan; Yao-Wen Chang (DAC, 2013)

Simultaneous analog placement and routing with current flow and current density considerations. - Hung-Chih Ou; Hsing-Chih Chang Chien; Yao-Wen Chang (DAC, 2013)

Nonuniform Multilevel Analog Routing With Matching Constraints. - Hung-Chih Ou; Hsing-Chih Chang Chien; Yao-Wen Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithography. - Hung-Chih Ou; Kai-Han Tseng; Yao-Wen Chang (DAC, 2015)

Coupling-Aware Length-Ratio-Matching Routing for Capacitor Arrays in Analog Integrated Circuits. - Kuan-Hsien Ho; Hung-Chih Ou; Yao-Wen Chang; Hui-Fang Tsao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

QB-trees: towards an optimal topological representation and its applications to analog layout designs. - I-Peng Wu; Hung-Chih Ou; Yao-Wen Chang (DAC, 2016)

Layout-Dependent Effects-Aware Analytical Analog Placement. - Hung-Chih Ou; Kai-Han Tseng; Jhao-Yan Liu; I-Peng Wu; Yao-Wen Chang (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)