Five new high-performance multiplexer-based 1-bit full adder cells. - Abdulkarim Al-Sheraidah; Bassem Alhalabi; Hung Tien Bui (ICECS, 2001)

Shunt-peaking in MCML gates and its application in the design of a 20 Gb/s half-rate phase detector. - Hung Tien Bui; Yvon Savaria (ISCAS (4), 2004)

10 GHz PLL Using Active Shunt-Peaked MCML Gates and Improved Frequency Acquisition XOR Phase Detector in 0.18 µm CMOS. - Hung Tien Bui; Yvon Savaria (IWSOC, 2004)

A Generic Method for Embedded Measurement and Compensation of Process and Temperature Variations in SoCs. - Hung Tien Bui; Yvon Savaria (IWSOC, 2005)

Dual-Path and Diode-Tracking Active Inductors for MCML Gates. - Hung Tien Bui (CCECE, 2006)

High speed differential pulse-width control loop based on frequency-to-voltage converters. - Hung Tien Bui; Yvon Savaria (ACM Great Lakes Symposium on VLSI, 2006)

A Low-Complexity High-Speed Clock Generator for Dynamic Frequency Scaling of FPGA and Standard-Cell Based Designs. - Bill Pontikakis; Hung Tien Bui; François R. Boyer; Yvon Savaria (ISCAS, 2007)

High speed CDR using a novel binary phase detector with probable-lock-detection. - Hung Tien Bui (ICECS, 2008)

Design of an all-digital variable length ring oscillator (VLRO) for clock synthesis. - Hung Tien Bui (ISCAS, 2008)

Design of a High-Speed Differential Frequency-to-Voltage Converter and Its Application in a 5-GHz Frequency-Locked Loop. - Hung Tien Bui; Yvon Savaria (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Sensorless vector control of PMSG for variable speed wind energy applications. - Jogendra Singh Thongam; Pierre Bouchard; Valentin Giurgiu; Hung Tien Bui; Mohand A. Ouhrouche (CCECE, 2010)

Peak-to-peak jitter reduction technique for the Free-Running Period Synthesizer (FRPS). - Marcel Siadjine Njinowa; Hung Tien Bui; François R. Boyer (ISCAS, 2010)

Rapid prototyping of the Goertzel algorithm for hardware acceleration of exon prediction. - Michel Voyer; Sylvain-Robert Rivard; Luc Morin; Hung Tien Bui (ISCAS, 2011)

Pipelined FPGA design of the Goertzel algorithm for exon prediction. - Hung Tien Bui (ISCAS, 2012)

Design of low power 4-bit flash ADC based on standard cells. - Marcel Siadjine Njinowa; Hung Tien Bui; François-Raymond Boyer (NEWCAS, 2013)