A new coarse-grained FPGA architecture exploration environment. - Husain Parvez; Zied Marrakchi; Umer Farooq 001; Habib Mehrez (FPT, 2008)

Enhanced Methodology and Tools for Exploring Domain-Specific Coarse-Grained FPGAs. - Husain Parvez; Zied Marrakchi; Habib Mehrez (ReConFig, 2008)

ASIF: Application Specific Inflexible FPGA. - Husain Parvez; Zied Marrakchi; Habib Mehrez (FPT, 2009)

On the optimization of FPGA area depending on target applications. - Zied Marrakchi; Husain Parvez; Alp Kiliç; Habib Mehrez; Hmaied Marrakchi (APCCAS, 2010)

Application Specific FPGA Using Heterogeneous Logic Blocks. - Husain Parvez; Zied Marrakchi; Habib Mehrez (ARC, 2010)

Heterogeneous-ASIF: an application specific inflexible FPGA using heterogeneous logic blocks (abstract only). - Husain Parvez; Zied Marrakchi; Habib Mehrez (FPGA, 2010)

Comparison between Heterogeneous Mesh-Based and Tree-Based Application Specific FPGA. - Umer Farooq 001; Husain Parvez; Zied Marrakchi; Habib Mehrez (ARC, 2011)

Exploration of Heterogeneous FPGA Architectures. - Umer Farooq 001; Husain Parvez; Habib Mehrez; Zied Marrakchi (Int. J. Reconfigurable Comput., 2011)

Application-Specific FPGA using heterogeneous logic blocks. - Husain Parvez; Zied Marrakchi; Alp Kiliç; Habib Mehrez (ACM Trans. Reconfigurable Technol. Syst., 2011)

A new heterogeneous tree-based application specific FPGA and its comparison with mesh-based application specific FPGA. - Umer Farooq 001; Husain Parvez; Habib Mehrez; Zied Marrakchi (Microprocess. Microsystems, 2012)

Exploration and optimization of a homogeneous tree-based application specific inflexible FPGA. - Umer Farooq 001; Husain Parvez; Habib Mehrez; Zied Marrakchi (Microelectron. J., 2013)

Diffusion-Based Placement Algorithm for Reducing High Interconnect Demand in Congested Regions of FPGAs. - Ali Asghar; Husain Parvez (ARC, 2014)

Design-space exploration between FPGA and ASIF. - Muhammad Amin Qureshi; Husain Parvez (ReCoSoC, 2014)

Exploring alternate trade-offs of placement quality versus runtime in Simulated Annealing algorithm. - Baqar Raza; Husain Parvez; Muhammad Mohiuddin (ReCoSoC, 2014)

An Improved Diffusion Based Placement Algorithm for Reducing Interconnect Demand in Congested Regions of FPGAs. - Ali Asghar; Husain Parvez (Int. J. Reconfigurable Comput., 2015)

Exploring shared SRAM tables among NPN equivalent large LUTs in SRAM-based FPGAs. - Ali Asghar; Muhammad Mazher Iqbal; Waqar Ahmed; Mujahid Ali; Husain Parvez; Muhammad Rashid 001 (FPT, 2016)

"Multi-Circuit": Automatic Generation of an Application Specific Configurable Core for Known Set of Application Circuits. - Muhammad Mazher Iqbal; Husain Parvez; Muhammad Rashid 001 (J. Circuits Syst. Comput., 2016)

Logic algebra for exploiting shared SRAM-table based FPGAs for large LUT inputs. - Ali Asghar; Muhammad Mazher Iqbal; Waqar Ahmed; Mujahid Ali; Husain Parvez; Muhammad Rashid 001 (INTELLECT, 2017)

Optimizing routing network of shared hardware design for multiple application circuits. - Muhammad Mazher Iqbal; Husain Parvez (INTELLECT, 2017)

Exploring Shared SRAM Tables in FPGAs for Larger LUTs and Higher Degree of Sharing. - Ali Asghar; Muhammad Mazher Iqbal; Waqar Ahmed; Mujahid Ali; Husain Parvez; Muhammad Rashid 001 (Int. J. Reconfigurable Comput., 2017)

An Application Specific Reconfigurable Architecture with Reduced Area and Static Memory Cells. - Muhammad Mazher Iqbal; Husain Parvez; Fasahat Hussain; Muhammad Rashid 001 (J. Circuits Syst. Comput., 2021)