3D FPGAs: placement, routing, and architecture evaluation (abstract only). - Cristinel Ababei; Hushrav Mogal; Kia Bazargan (FPGA, 2005)

Placement and Routing in 3D Integrated Circuits. - Cristinel Ababei; Yan Feng; Brent Goplen; Hushrav Mogal; Tianpei Zhang; Kia Bazargan; Sachin S. Sapatnekar (IEEE Des. Test Comput., 2005)

Three-dimensional place and route for FPGAs. - Cristinel Ababei; Hushrav Mogal; Kia Bazargan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Microarchitecture floorplanning for sub-threshold leakage reduction. - Hushrav Mogal; Kia Bazargan (DATE, 2007)

Clustering based pruning for statistical criticality computation under process variations. - Hushrav Mogal; Haifeng Qian; Sachin S. Sapatnekar; Kia Bazargan (ICCAD, 2007)

Thermal-aware floorplanning for task migration enabled active sub-threshold leakage reduction. - Hushrav Mogal; Kia Bazargan (ICCAD, 2008)

Fast and Accurate Statistical Criticality Computation Under Process Variations. - Hushrav Mogal; Haifeng Qian; Sachin S. Sapatnekar; Kia Bazargan (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)