An accurate and efficient estimation of switching noise in synchronous digital circuits. - Husni M. Habal; Terri S. Fiez; Kartikeya Mayaram (ISCAS (2), 2004)

Accurate and efficient simulation of synchronous digital switching noise in systems on a chip. - Husni M. Habal; Kartikeya Mayaram; Terri S. Fiez (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Constraint-Based Layout-Driven Sizing of Analog Circuits. - Husni M. Habal; Helmut Graeb (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Evaluating analog circuit performance in light of MOSFET aging at different time scales. - Husni M. Habal; Helmut E. Graeb (ICICDT, 2013)

Procedural capacitor placement in differential charge-scaling converters by nonlinearity analysis. - Florin Burcea; Husni M. Habal; Helmut E. Graeb (DAC, 2016)

A step-accurate model for the trapping and release of charge carriers suitable for the transient simulation of analog circuits. - Husni M. Habal; Helmut Graeb (Microelectron. Reliab., 2016)

A New Chessboard Placement and Sizing Method for Capacitors in a Charge-Scaling DAC by Worst-Case Analysis of Nonlinearity. - Florin Burcea; Husni M. Habal; Helmut E. Graeb (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

A Generic Procedural Generator for Sizing of Analog Integrated Circuits. - Matthias Schweikardt; Yannick Uhlmann; Florian Leber; Jürgen Scheible; Husni M. Habal (PRIME, 2019)

Derivative free methodologies for circuit worst case analysis. - Vittorio Latorre; Husni M. Habal; Helmut Graeb; Stefano Lucidi (Optim. Lett., 2019)

Compact Models for Initial MOSFET Sizing Based on Higher-order Artificial Neural Networks. - Husni M. Habal; Dobroslav Tsonev; Matthias Schweikardt (MLCAD, 2020)

PASTEL: Parasitic Matching-Driven Placement and Routing of Capacitor Arrays With Generalized Ratios in Charge-Redistribution SAR-ADCs. - Ye X. Ding; Florin Burcea; Husni M. Habal; Helmut E. Graeb (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)