Layout placement optimization with isolation rings for high-voltage VLSI circuits. - Chih-Wei Lee; Hwa-Yi Tseng; Chi-Lien Kuo; Chien-Nan Jimmy Liu; Chin Hsia (VLSI-DAT, 2017)

Performance-preserved analog routing methodology via wire load reduction. - Hao-Yu Chi; Hwa-Yi Tseng; Chien-Nan Jimmy Liu; Hung-Ming Chen (ASP-DAC, 2018)