A 9.2 GHz Digital Phase-Locked Loop With Peaking-Free Transfer Function. - Sigang Ryu; Hwanseok Yeo; Yoontaek Lee; Seuk Son; Jaeha Kim (IEEE J. Solid State Circuits, 2014)

13.1 A 940MHz-bandwidth 28.8µs-period 8.9GHz chirp frequency synthesizer PLL in 65nm CMOS for X-band FMCW radar applications. - Hwanseok Yeo; Sigang Ryu; Yoontaek Lee; Seuk Son; Jaeha Kim (ISSCC, 2016)

A 2 × Blind Oversampling FSE Receiver With Combined Adaptive Equalization and Infinite-Range Timing Recovery. - Seuk Son; Sigang Ryu; Hwanseok Yeo; Jaeha Kim (IEEE J. Solid State Circuits, 2019)