FPGA Low Power Technology Mapping for Reuse Module Design under the Time Constraint. - Jae-Jin Kim; Hyeon-Mi Yang; Keun Ho Ryu; Hi-Seok Kim (FGCN (2), 2008)

Two Stage Demosaicing Algorithm for Color Filter Arrays. - Hyeon-Mi Yang; Sea-Ho Kim; Yang-Ki Cho; Joo-shin Lee; Hi-Seok Kim (FGIT-FGCN, 2009)