A Fully Parallel, High-Speed BPC Hardware Architecture for the EBCOT in JPEG 2000. - Dong-Hwi Woo; Kyeong-Ryeol Bae; Hyeon-Sik Son; Seung-Ho Ok; Yong-Hwan Lee; Byungin Moon (FGIT-FGCN (2), 2010)

An Efficient Interworking Architecture of a Network Processor for Layer 7 Packet Processing. - Kyeong-Ryeol Bae; Seung-Ho Ok; Hyeon-Sik Son; Sang Yoon Oh; Yong-Hwan Lee; Byungin Moon (FGIT-FGCN (1), 2011)

A Rectification Hardware Architecture for an Adaptive Multiple-Baseline Stereo Vision System. - Hyeon-Sik Son; Kyeong-Ryeol Bae; Seung-Ho Ok; Yong-Hwan Lee; Byungin Moon (FGIT-FGCN (1), 2011)

A census-based stereo matching algorithm with multiple sparse windows. - Kyeong-Ryeol Bae; Hyeon-Sik Son; Jongkil Hyun; Byungin Moon (ICUFN, 2015)

A Multi-Level Accumulation-Based Rectification Method and Its Circuit Implementation. - Hyeon-Sik Son; Byungin Moon (KSII Trans. Internet Inf. Syst., 2017)