A type and effect system for deterministic parallel Java. - Robert L. Bocchino Jr.; Vikram S. Adve; Danny Dig; Sarita V. Adve; Stephen Heumann; Rakesh Komuravelli; Jeffrey Overbey; Patrick Simmons; Hyojin Sung; Mohsen Vakilian (OOPSLA, 2009)

Parallel SAH k-D tree construction. - Byn Choi; Rakesh Komuravelli; Victor Lu; Hyojin Sung; Robert L. Bocchino Jr.; Sarita V. Adve; John C. Hart (High Performance Graphics, 2010)

DeNovo: Rethinking the Memory Hierarchy for Disciplined Parallelism. - Byn Choi; Rakesh Komuravelli; Hyojin Sung; Robert Smolinski; Nima Honarmand; Sarita V. Adve; Vikram S. Adve; Nicholas P. Carter; Ching-Tsun Chou (PACT, 2011)

DeNovoND: efficient hardware support for disciplined non-determinism. - Hyojin Sung; Rakesh Komuravelli; Sarita V. Adve (ASPLOS, 2013)

DeNovoND: Efficient Hardware for Disciplined Nondeterminism. - Hyojin Sung; Rakesh Komuravelli; Sarita V. Adve (IEEE Micro, 2014)

DeNovoSync: Efficient Support for Arbitrary Synchronization without Writer-Initiated Invalidations. - Hyojin Sung; Sarita V. Adve (ASPLOS, 2015)

Eliminating on-chip traffic waste: are we there yet? - Robert Smolinski; Rakesh Komuravelli; Hyojin Sung; Sarita V. Adve (ISPASS, 2015)

Performance analysis of OpenMP on a GPU using a CORAL proxy application. - Gheorghe-Teodor Bercea; Carlo Bertolli; Samuel F. Antão; Arpith C. Jacob; Alexandre E. Eichenberger; Tong Chen 001; Zehra Sura; Hyojin Sung; Georgios Rokos; David Appelhans; Kevin O'Brien (PMBS@SC, 2015)

Integrating GPU support for OpenMP offloading directives into Clang. - Carlo Bertolli; Samuel Antão; Gheorghe-Teodor Bercea; Arpith C. Jacob; Alexandre E. Eichenberger; Tong Chen 001; Zehra Sura; Hyojin Sung; Georgios Rokos; David Appelhans; Kevin O'Brien (LLVM@SC, 2015)

DeNovo: rethinking the memory hierarchy for disciplined parallelism - Hyojin Sung (2015)

Automatic Copying of Pointer-Based Data Structures. - Tong Chen 001; Zehra Sura; Hyojin Sung (LCPC, 2016)

Offloading Support for OpenMP in Clang and LLVM. - Samuel F. Antão; Alexey Bataev; Arpith C. Jacob; Gheorghe-Teodor Bercea; Alexandre E. Eichenberger; Georgios Rokos; Matt Martineau; Tian Jin; Guray Ozen; Zehra Sura; Tong Chen 001; Hyojin Sung; et al. (LLVM-HPC@SC, 2016)

Performance Analysis and Optimization of Clang's OpenMP 4.5 GPU Support. - Matt Martineau; Simon McIntosh-Smith; Carlo Bertolli; Arpith C. Jacob; Samuel F. Antão; Alexandre E. Eichenberger; Gheorghe-Teodor Bercea; Tong Chen 001; Tian Jin; Kevin O'Brien; Georgios Rokos; Hyojin Sung; et al. (PMBS@SC, 2016)

Efficient Fork-Join on GPUs Through Warp Specialization. - Arpith Chacko Jacob; Alexandre E. Eichenberger; Hyojin Sung; Samuel F. Antão; Gheorghe-Teodor Bercea; Carlo Bertolli; Alexey Bataev; Tian Jin; Tong Chen 001; Zehra Sura; Georgios Rokos; Kevin O'Brien (HiPC, 2017)

Leveraging OpenMP 4.5 Support in CLANG for Fortran. - Hyojin Sung; Tong Chen 001; Zehra Sura; Tarique Islam (IWOMP, 2017)

Implementing implicit OpenMP data sharing on GPUs. - Gheorghe-Teodor Bercea; Carlo Bertolli; Arpith C. Jacob; Alexandre E. Eichenberger; Alexey Bataev; Georgios Rokos; Hyojin Sung; Tong Chen 001; Kevin O'Brien (LLVM-HPC@SC, 2017)

POSTER: CogR: Exploiting Program Structures for Machine-Learning Based Runtime Solutions. - Hyojin Sung; Tong Chen 001; Alexandre E. Eichenberger; Kevin K. O'Brien (PACT, 2019)

Using Structured Input and Modularity for Improved Learning. - Zehra Sura; Tong Chen 001; Hyojin Sung (CoRR, 2019)

Hybrid Register Allocation with Spill Cost and Pattern Guided Optimization. - Yongwon Shin; Hyojin Sung (LCPC, 2021)

Near-Data Processing in Memory Expander for DNN Acceleration on GPUs. - Hyungkyu Ham; Hyunuk Cho; Minjae Kim 001; Jueon Park; Jeongmin Hong; Hyojin Sung; Eunhyeok Park; Euicheol Lim; Gwangsun Kim (IEEE Comput. Archit. Lett., 2021)

MetaTune: Meta-Learning Based Cost Model for Fast and Efficient Auto-tuning Frameworks. - Jaehun Ryu; Hyojin Sung (CoRR, 2021)

One-shot tuner for deep learning compilers. - Jaehun Ryu; Eunhyeok Park; Hyojin Sung (CC, 2022)

Runtime Support for Accelerating CNN Models on Digital DRAM Processing-in-Memory Hardware. - Yongwon Shin; Juseong Park; Jeongmin Hong; Hyojin Sung (IEEE Comput. Archit. Lett., 2022)

PIMFlow: Compiler and Runtime Support for CNN Models on Processing-in-Memory DRAM. - Yongwon Shin; Juseong Park; Sungjun Cho; Hyojin Sung (CGO, 2023)

PRIMO: A Full-Stack Processing-in-DRAM Emulation Framework for Machine Learning Workloads. - Jaehoon Heo; Yongwon Shin; Sangjin Choi; Sungwoong Yune; Jung-Hoon Kim; Hyojin Sung; Youngjin Kwon; Joo-Young Kim 001 (ICCAD, 2023)

Multi-Objective Architecture Search and Optimization for Heterogeneous Neuromorphic Architecture. - Juseong Park; Yongwon Shin; Hyojin Sung (ICCAD, 2023)

XLA-NDP: Efficient Scheduling and Code Generation for Deep Learning Model Training on Near-Data Processing Memory. - Jueon Park; Hyojin Sung (IEEE Comput. Archit. Lett., 2023)

NavCim: Comprehensive Design Space Exploration for Analog Computing-in-Memory Architectures. - Juseong Park; Boseok Kim; Hyojin Sung (PACT, 2024)

Low-Overhead General-Purpose Near-Data Processing in CXL Memory Expanders. - Hyungkyu Ham; Jeongmin Hong; Geonwoo Park; Yunseon Shin; Okkyun Woo; Wonhyuk Yang; Jinhoon Bae; Eunhyeok Park; Hyojin Sung; Euicheol Lim; Gwangsun Kim (MICRO, 2024)

Non-Invasive, Memory Access-Triggered Near-Data Processing for DNN Training Acceleration on GPUs. - Hyungkyu Ham; Hyunuk Cho; Minjae Kim 001; Jueon Park; Jeongmin Hong; Hyojin Sung; Eunhyeok Park; Euicheol Lim; Gwangsun Kim (IEEE Access, 2024)

IMTP: Search-based Code Generation for In-memory Tensor Programs. - Yongwon Shin; Dookyung Kang; Hyojin Sung (CoRR, 2024)

ATiM: Autotuning Tensor Programs for Processing-in-DRAM. - Yongwon Shin; Dookyung Kang; Hyojin Sung (ISCA, 2025)