A 0.6-V Delta-Sigma Modulator With Subthreshold-Leakage Suppression Switches. - Hyungdong Roh; Hyoungjoong Kim; Youngkil Choi; Jeongjin Roh; Yi-Gyeong Kim; Jong-Kee Kwon (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

22.5 An 8nm 18Gb/s/pin GDDR6 PHY with TX Bandwidth Extension and RX Training Technique. - Soo-Min Lee; Kihwan Seong; Joohee Shin; Hyoungjoong Kim; Jaehyun Jeong; Shinyoung Yi 002; Juyoung Kim; Eunsu Kim; Sukhyun Jung; Sangyun Hwang; Jihun Oh; Kwanyeob Chae; et al. (ISSCC, 2020)

A 64Gb/s Downlink and 32Gb/s Uplink NRZ Wireline Transceiver with Supply Regulation, Background Clock Correction and EOM-based Channel Adaptation for Mid-Reach Cellular Mobile Interface in 8nm FinFET. - Soo-Min Lee; Jihoon Lim; Jaehyuk Jang; Hyoungjoong Kim; Kyunghwan Min; Woongki Min; Hyeonji Han; Gyusik Kim; Jaeyoung Kim; Chulho Kim; Sejun Jeon; Jinhoon Park; et al. (ESSCIRC, 2022)

A 0.036mm2 80Mb/s-to-15.96Gb/s C-PHY and D-PHY Combo Receiver with Background Calibrations in 4nm FinFET. - Woongki Min; Soo-Min Lee; Taejin Jang; Yunsik Jo; Hyoungjoong Kim; Younggyun Oh; Myeong-Cheol Kim; Hyeonji Han; Cheolhwan Lim; Seungjun Lee; Jihoon Lee; Yon Jun Shin; et al. (A-SSCC, 2024)