Coarse-grained carry architecture for FPGA (poster abstract). - Hyuk-Jun Lee; Michael J. Flynn (FPGA, 2000)

Exploiting Parallelism and Data Locality of Systolic Array Applications using Multi-Ported FPGA. - Hyuk-Jun Lee; Albert A. Liddicoat; Michael J. Flynn (PDPTA, 2000)

Slack-based Bus Arbitration Scheme for Soft Real-time Constrained Embedded Systems. - Minje Jun; Kwanhu Bang; Hyuk-Jun Lee; Naehyuck Chang; Eui-Young Chung (ASP-DAC, 2007)

Scenario-Aware Bus Functional Modeling for Architecture-Level Performance Analysis. - Eui-Young Chung; Hyuk-Jun Lee; Sung Woo Chung (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007)

Latency-Aware Bus Arbitration for Real-Time Embedded Systems. - Minje Jun; Kwanhu Bang; Hyuk-Jun Lee; Eui-Young Chung (IEICE Trans. Inf. Syst., 2007)

Scalable QoS-Aware Memory Controller for High-Bandwidth Packet Memory. - Hyuk-Jun Lee; Eui-Young Chung (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Analytical memory bandwidth model for many-core processor based systems. - Hyuk-Jun Lee; Woo-Cheol Cho; Eui-Young Chung (IEICE Electron. Express, 2012)

Implementation of a Large-Scale Language Model in a Cloud Environment for Human-Robot Interaction. - Dae-Young Jung; Hyuk-Jun Lee; Sung-Yong Park; Myoung-Wan Koo; Ji-Hwan Kim; Jeong-Sik Park; Hyung-Bae Jeon; Yun-Keun Lee (ITCS, 2013)

Page overwriting method for performance improvement of NAND flash memories. - Samkyu Won; Eui-Young Chung; DuckJu Kim; Junseop Chung; Bong-Seok Han; Hyuk-Jun Lee (IEICE Electron. Express, 2013)

A Low-Power Packet Memory Architecture with a Latency-Aware Packet Mapping Method. - Hyuk-Jun Lee; Seung-Chul Kim; Eui-Young Chung (IEICE Trans. Inf. Syst., 2013)

A Performance and Usability Aware Secure Two-Factor User Authentication Scheme for Wireless Sensor Networks. - Sang Guun Yoo; Hyukjun Lee; Juho Kim (Int. J. Distributed Sens. Networks, 2013)

A dynamic block device reconfiguration algorithm in virtual MapReduce cluster. - Kwonyong Lee; Yoonsung Nam; Taekhee Kim; Sungyong Park; Hyuk-Jun Lee; Jihoon Yang (Clust. Comput., 2014)

An optimal DRAM sizing and partitioning method for NVRAM based hybrid memory architecture. - Jongbum Lim; Yongwoon Song; Hyuk-Jun Lee (IEICE Electron. Express, 2014)

Design of a bitmap-based QoS-aware memory controller for a packet memory. - Seunghak Yu; Sungroh Yoon; Eui-Young Chung; Hyuk-Jun Lee (IEICE Electron. Express, 2014)

Classifying Useful Motion Vectors for Efficient Frame Rate Up Conversion of MC-DCT Encoded Video Streams. - Jongho Nang; Sangchul Kim; Hyuk-Jun Lee (J. Inf. Sci. Eng., 2014)

An Adaptive Idle-Time Exploiting Method for Low Latency NAND Flash-Based Storage Devices. - Sang-Hoon Park; Dong-gun Kim; Kwanhu Bang; Hyuk-Jun Lee; Sungjoo Yoo; Eui-Young Chung (IEEE Trans. Computers, 2014)

Implementation of a large-scale language model adaptation in a cloud environment. - Kwang-Ho Kim; Dae-Young Jung; Donghyun Lee 001; Hyuk-Jun Lee; Sung-Yong Park; Myoung-Wan Koo; Ji-Hwan Kim; Jeong-Sik Park; Hyung-Bae Jeon; Yun-Keun Lee (Multim. Tools Appl., 2016)

FeSSD: A Fast Encrypted SSD Employing On-Chip Access-Control Memory. - Junghee Lee; Kalidas Ganesh; Hyuk-Jun Lee; Youngjae Kim 001 (IEEE Comput. Archit. Lett., 2017)

Scalable Bandwidth Shaping Scheme via Adaptively Managed Parallel Heaps in Manycore-Based Network Processors. - Taehyun Kim; Jongbum Lim; Jinku Kim; Woo-Cheol Cho; Eui-Young Chung; Hyuk-Jun Lee (ACM Trans. Design Autom. Electr. Syst., 2017)

A High-Bandwidth PCM-Based Memory System for Highly Available IP Routing Table Lookup. - Chinam Kim; Hyukjun Lee (IEEE Comput. Archit. Lett., 2018)

Application specific cache design using STT-RAM based block-RAM for FPGA-based soft processors. - Hyunwoo Park; Hyun So; Hyukjun Lee (IEICE Electron. Express, 2018)

Energy Efficient Mobile Positioning System Using Adaptive Particle Filter. - Yoojin Kim; Yongwoon Song; Hyuk-Jun Lee (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018)

Parameterised codebook design based on channel statistics for efficient multi-rank MIMO transmission. - Sungin Shin; Hyukjun Lee; Changhyeon Kim; Wonjin Sung; Jonghyun Park (IET Commun., 2018)

IP-aware cache partition and replacement scheme for mobile computing devices. - Bobae Kim; Hyukjun Lee (IEICE Electron. Express, 2019)

Designing a High Performance SRAM-DRAM Hybrid Memory Architecture for Packet Buffers. - Yongwoon Song; Dongkeon Choi; Hyuk-Jun Lee (IEICE Trans. Electron., 2019)

A Novel NAND Flash Memory Architecture for Maximally Exploiting Plane-Level Parallelism. - Myeongjin Kim; Wontaeck Jung; Hyukjun Lee; Eui-Young Chung (IEEE Trans. Very Large Scale Integr. Syst., 2019)

EANeM: Energy-Aware Network Stack Management for Mobile Devices. - Chungseop Lee; Keonhyuk Lee; Mingoo Kang; Hyukjun Lee (DAC, 2020)

Per-Operation Reusability Based Allocation and Migration Policy for Hybrid Cache. - Minsik Oh; Kwangsu Kim; Duheon Choi; Hyukjun Lee; Eui-Young Chung (IEEE Trans. Computers, 2020)

Multitoken-Based Power Management for NAND Flash Storage Devices. - Tae-Hee You; Sangwoo Han; Young Min Park; Hyuk-Jun Lee; Eui-Young Chung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Highly Available Packet Buffer Design With Hybrid Nonvolatile Memory. - Yongwoon Song; Jooyoung Hwang; Insoon Jo; Hyukjun Lee (IEEE Trans. Very Large Scale Integr. Syst., 2021)

STT-MRAM-Based Multicontext FPGA for Multithreading Computing Environment. - Jeongbin Kim 001; Yongwoon Song; Kyungseon Cho; Hyukjun Lee; Hongil Yoon; Eui-Young Chung (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

High Bandwidth and Highly Available Packet Buffer Design Using Multi-Retention Time MRAM. - Yongwoon Song; Munhyung Lee; Hyukjun Lee (IEEE Access, 2023)

Enhancing On-Device DNN Inference Performance With a Reduced Retention-Time MRAM-Based Memory Architecture. - Munhyung Lee; Taehan Lee; Junwon Yeo; Hyukjun Lee (IEEE Access, 2024)

Token Pruning in Audio Transformers: Optimizing Performance and Decoding Patch Importance. - Taehan Lee; Hyukjun Lee (CoRR, 2025)