A 10-Bit 800-MHz 19-mW CMOS ADC. - Shiuh-Hua Wood Chiang; Hyuk Sun; Behzad Razavi (IEEE J. Solid State Circuits, 2014)

A VCO-based spatial averaging stochastic ADC. - Hyuk Sun; Jason Muhlestein; Un-Ku Moon (ICECS, 2015)

MDLL/PLL dual-path clock generator. - Hyuk Sun; Un-Ku Moon (MWSCAS, 2015)

Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency. - Yang Xu 005; Hyuk Sun; Un-Ku Moon (MWSCAS, 2015)

A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers. - Hyuk Sun; Jason Muhlestein; Spencer Leuenberger; Kazuki Sobue; Koichi Hamashita; Un-Ku Moon (A-SSCC, 2016)

A power efficient PLL with in-loop-bandwidth spread-spectrum modulation scheme using a charge-based discrete-time loop filter. - Hyuk Sun; Kazuki Sobue; Koichi Hamashita; Un-Ku Moon (ISCAS, 2016)

A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier. - Spencer Leuenberger; Jason Muhlestein; Hyuk Sun; Praveen Kumar Venkatachala; Un-Ku Moon (CICC, 2017)

A 73dB SNDR 20MS/s 1.28mW SAR-TDC using hybrid two-step quantization. - Jason Muhlestein; Spencer Leuenberger; Hyuk Sun; Yang Xu 005; Un-Ku Moon (CICC, 2017)

A 0.951 psrms period jitter, 3.2% modulation range, DSM-free, spread-spectrum PLL. - Hyuk Sun; Kazuki Sobue; Koichi Hamashita; Tejasvi Anand; Un-Ku Moon (CICC, 2017)

An Oversampling Stochastic ADC Using VCO-Based Quantizers. - Hyuk Sun; Kazuki Sobue; Koichi Hamashita; Un-Ku Moon (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A 951-fsrms Period Jitter 3.2% Modulation Range in-Band Modulation Spread-Spectrum Clock Generator. - Hyuk Sun; Kazuki Sobue; Koichi Hamashita; Tejasvi Anand; Un-Ku Moon (IEEE J. Solid State Circuits, 2020)

Detection and Mitigation of nBTI Aging of a High Precision Current Comparator in 16 nm FinFET Technology. - Hyuk Sun; Paul Wilkins; Steve Rose; Gil Engel (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)