A 100mK-NETD 100ms-startup-time 80×60 micro-bolometer CMOS thermal imager integrated with a 0.234mm2 1.89μVrms noise 12b biasing DAC. - Kiduk Kim; Seunghyun Park; Kye-Seok Yoon; Gyeong-Gu Kang; Hyun-Ki Han; Ji-Su Choi; Min-Woo Ko; Jeong-Hyun Cho; Sangjin Lim; Hyung-Min Lee; Hyunsik Kim; Kwyro Lee; et al. (ISSCC, 2018)

A 97% high-efficiency 6μs fast-recovery-time buck-based step-up/down converter with embedded 1/2 and 3/2 charge-pumps for li-lon battery management. - Min-Woo Ko; Kiduk Kim; Young-Jin Woo; Se-Un Shin; Hyun-Ki Han; Yeunhee Huh; Gyeong-Gu Kang; Jeong-Hyun Cho; Sang-Jin Lim; Se-Hong Park; Hyung-Min Lee; Gyu-Hyeong Cho (ISSCC, 2018)

A 95.2% efficiency dual-path DC-DC step-up converter with continuous output current delivery and low voltage ripple. - Se-Un Shin; Yeunhee Huh; Yong-Min Ju; Sung-Won Choi; Changsik Shin; Young-Jin Woo; Minseong Choi; Se-Hong Park; Young-Hoon Sohn; Min-Woo Ko; Youngsin Jo; Hyun-Ki Han; et al. (ISSCC, 2018)

17.8 A 90.5%-Efficiency 28.7µ VRMS-Noise Bipolar-Output High-Step-Up SC DC-DC Converter with Energy-Recycled Regulation and Post-Filtering for ±15V TFT-Based LAE Sensors. - Min-Woo Ko; Hyun-Ki Han; Hyun-Sik Kim (ISSCC, 2021)

A 5V Dynamic Class-C Paralleled Single-Stage Amplifier with Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique. - Seok-Tae Koh; Ji-Hun Lee; Gyeong-Gu Kang; Hyun-Ki Han; Hyun-Sik Kim (ISSCC, 2021)

A 5-V Dynamic Class-C Paralleled Single-Stage Amplifier With Near-Zero Dead-Zone Control and Current-Redistributive Rail-to-Rail Gm-Boosting Technique. - Seok-Tae Koh; Ji-Hun Lee; Gyeong-Gu Kang; Hyun-Ki Han; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2021)

A Monolithic 48V-to-1V 10A Quadruple Step-Down DC-DC Converter with Hysteretic Copied On-Time 4-Phase Control and 2× Slew Rate All-Hysteretic Mode. - Hyun-Ki Han; Min-Woo Ko; Jeong-Hyun Cho; Gyeong-Gu Kang; Seok-Tae Koh; Hong-Hyun Bae; Hyun-Sik Kim (VLSI Technology and Circuits, 2022)

A 4-to-42V Input, 95.5% Efficiency, 3.2μA-IQ, DC-DC Buck Converter Featuring a Leakage-Emulated Bootstrap Re-fresher and Anti-Deadlock Self-Bias Supply for Battery-Powered Automotive Uses. - Heejun Lee; Hyunki Han; Hyun-Sik Kim (CICC, 2023)

A Bipolar-Output Switched-Capacitor DC-DC Boost Converter With Residual-Energy-Recycling Regulation and Low Dropout Post-Filtering Techniques. - Min-Woo Ko; Hyunki Han; Hyun-Sik Kim (IEEE J. Solid State Circuits, 2023)

28.5 A 94.1%-Efficiency Parallel-SC Hybrid Buck Converter Designed Using VCR-Aware Topology Optimizer for a 4.2A/mm² Current-Density FoM. - Hyunki Han; Jeong-Hyun Cho; Woojin Jang; Yousung Park; Jiho Lee; Hyun-Sik Kim (ISSCC, 2024)

A 1.8V-Input 0.2-to-1.5V-Output 2.5A 930mA/mm3 Always-Balanced Dual-Path Hybrid Buck Converter with Seamlessly All-VCR-Coverable Tri-Mode Operation. - Dae-Hyeon Kim; Jeong-Hyun Cho; Hyunki Han; Hyun-Sik Kim (VLSI Technology and Circuits, 2024)

A 1.8V Input, 96.5% Efficiency, 4.05A/mm2 FoM, Three-Level Dual-Path Hybrid Buck Converter with Mitigated Capacitive Inrush Current and Seamless DVS Across a Wide 0.4-to-1.5V Output Range. - Jae-Hyun Kim; Jun-Gi Lee; Hyunki Han; Hyun-Sik Kim (CICC, 2025)