A four-channel 3.125-Gb/s/ch CMOS serial-link transceiver with a mixed-mode adaptive equalizer. - Jinwook Kim; Jeongsik Yang; Sangjin Byun; Hyunduk Jun; Jeongkyu Park; Cormac S. G. Conroy; Beomsup Kim (IEEE J. Solid State Circuits, 2005)