A one division per clock pipelined division architecture based on LAPR (lookahead of partial-remainder) for low-power ECC applications. - Hyung-Joon Kwon; Kwyro Lee (ISLPED, 1997)

A Finite Field Processor Employing Dual Parallel Datapath for High-Speed/Low-Power RS-ECC Applications. - Hyung-Joon Kwon; Young-Beom Jang; Bangwon Lee (IEEE International Conference on Multimedia and Expo (III), 2000)

Logical Pseudocode: Connecting Algorithms with Proofs. - Keehang Kwon; Hyung-Joon Kwon (CoRR, 2022)