A 159mm2 32nm 32Gb MLC NAND-flash memory with 200MB/s asynchronous DDR interface. - Hyunggon Kim; Jung-Hoon Park; Ki-Tae Park; Pansuk Kwak; Ohsuk Kwon; Chulbum Kim; Younyeol Lee; Sangsoo Park; Kyungmin Kim; Doohyun Cho; Juseok Lee; Jungho Song; et al. (ISSCC, 2010)

A 21 nm High Performance 64 Gb MLC NAND Flash Memory With 400 MB/s Asynchronous Toggle DDR Interface. - Chulbum Kim; Jinho Ryu; Tae-Sung Lee; Hyunggon Kim; Jaewoo Lim; Jaeyong Jeong; Seonghwan Seo; Hongsoo Jeon; Bokeun Kim; Inyoul Lee; Dooseop Lee; Pansuk Kwak; et al. (IEEE J. Solid State Circuits, 2012)

19.5 Three-dimensional 128Gb MLC vertical NAND Flash-memory with 24-WL stacked layers and 50MB/s high-speed programming. - Ki-Tae Park; Jin-Man Han; Dae-Han Kim; Sangwan Nam; Kihwan Choi; Minsu Kim 004; Pansuk Kwak; Doosub Lee; Yoon-Hee Choi; Kyung-Min Kang; Myung-Hoon Choi; Dong-Hun Kwak; et al. (ISSCC, 2014)

7.6 1GB/s 2Tb NAND flash multi-chip package with frequency-boosting interface chip. - Hyun-Jin Kim; Jeong-Don Lim; Jang-Woo Lee; Dae-Hoon Na; Joon-Ho Shin; Chae-Hoon Kim; Seungwoo Yu; Ji-Yeon Shin; Seon-Kyoo Lee; Devraj Rajagopal; Sang-Tae Kim; Kyeong-Tae Kang; et al. (ISSCC, 2015)

7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (ISSCC, 2016)

7.5 A 128Gb 2b/cell NAND flash memory in 14nm technology with tPROG=640µs and 800MB/s I/O rate. - Seungjae Lee 001; Jin-Yub Lee; Il-Han Park; Jong-Yeol Park; Sung-Won Yun; Minsu Kim 004; Jong-Hoon Lee; Min-Seok Kim; Kangbin Lee; Taeeun Kim; Byungkyu Cho; Dooho Cho; et al. (ISSCC, 2016)

11.4 A 512Gb 3b/cell 64-stacked WL 3D V-NAND flash memory. - Chulbum Kim; Ji-Ho Cho; Woopyo Jeong; Il-Han Park; Hyun Wook Park; Doo-Hyun Kim; Daewoon Kang; Sunghoon Lee; Ji-Sang Lee; Wontae Kim 004; Jiyoon Park; Yang-Lo Ahn; et al. (ISSCC, 2017)

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (IEEE J. Solid State Circuits, 2017)

A 512-Gb 3-b/Cell 64-Stacked WL 3-D-NAND Flash Memory. - Chulbum Kim; Doo-Hyun Kim; Woopyo Jeong; Hyun-Jin Kim; Il-Han Park; Hyun Wook Park; Jong-Hoon Lee; Jiyoon Park; Yang-Lo Ahn; Ji Young Lee; Seungbum Kim; Hyun-Jun Yoon; et al. (IEEE J. Solid State Circuits, 2018)

13.1 A 1Tb 4b/cell NAND Flash Memory with tPROG=2ms, tR=110µs and 1.2Gb/s High-Speed IO Rate. - Doo-Hyun Kim; Hyunggon Kim; Sung-Won Yun; Youngsun Song; Jisu Kim; Sung-Min Joe; Kyung-Hwa Kang; Joonsuc Jang; Hyun-Jun Yoon; Kangbin Lee; Minseok Kim; Joonsoo Kwon; et al. (ISSCC, 2020)

Issues and Key Technologies for Next Generation 3D NAND. - Chiweon Yoon; Hyunggon Kim; Seon-Kyoo Lee; Jinyub Lee; Jai Hyuk Song (ICEIC, 2021)

13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO Rate. - Wontaeck Jung; Hyunggon Kim; Do-Bin Kim; Tae-Hyun Kim; Nam-Hee Lee; Dongjin Shin; Minyoung Kim; Youngsik Rho; Hun-Jong Lee; Yujin Hyun; Jaeyoung Park; Taekyung Kim; et al. (ISSCC, 2024)