Dynamic data scratchpad memory management for a memory subsystem with an MMU. - Hyungmin Cho; Bernhard Egger 002; Jaejin Lee; Heonshik Shin (LCTES, 2007)

High recording density hard disk channel equalization using a bilinear recursive polynomial model. - Sooyong Choi; Gyuyeol Kong; Hyungmin Cho; Jaejin Lee; Joohyun Lee (IEICE Electron. Express, 2009)

ERSA: Error Resilient System Architecture for probabilistic applications. - Larkhoon Leem; Hyungmin Cho; Jason Bau; Quinn A. Jacobson; Subhasish Mitra (DATE, 2010)

Cross-layer error resilience for robust systems. - Larkhoon Leem; Hyungmin Cho; Hsiao-Heng Lee; Young Moon Kim; Yanjing Li; Subhasish Mitra (ICCAD, 2010)

Robust System Design. - Subhasish Mitra; Hyungmin Cho; Ted Hong; Young Moon Kim; Hsiao-Heng Lee; Larkhoon Leem; Yanjing Li; David Lin; Evelyn Mintarno; Diana Mui; Sung-Boem Park; Nishant Patil; et al. (IPSJ Trans. Syst. LSI Des. Methodol., 2011)

Probabilistic analysis of Gallager B faulty decoder. - S. M. Sadegh Tabatabaei Yazdi; Hyungmin Cho; Yifan Sun 001; Subhasish Mitra; Lara Dolecek (ICC, 2012)

Eigenmode BER based MU-MIMO scheduling for rate maximization with linear precoding and power allocation. - Kyeongjun Ko; Hyungmin Cho; Jungwoo Lee 001 (WCNC, 2012)

ERSA: Error Resilient System Architecture for Probabilistic Applications. - Hyungmin Cho; Larkhoon Leem; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

Quantitative evaluation of soft error injection techniques for robust system design. - Hyungmin Cho; Shahrzad Mirkhani; Chen-Yong Cher; Jacob A. Abraham; Subhasish Mitra (DAC, 2013)

Gallager B Decoder on Noisy Hardware. - S. M. Sadegh Tabatabaei Yazdi; Hyungmin Cho; Lara Dolecek (IEEE Trans. Commun., 2013)

Rethinking error injection for effective resilience. - Shahrzad Mirkhani; Hyungmin Cho; Subhasish Mitra; Jacob A. Abraham (ASP-DAC, 2014)

The resilience wall: Cross-layer solution strategies. - Subhasish Mitra; Pradip Bose; Eric Cheng; Chen-Yong Cher; Hyungmin Cho; Rajiv V. Joshi; Young Moon Kim; Charles R. Lefurgy; Yanjing Li; Kenneth P. Rodbell; Kevin Skadron; James H. Stathis; et al. (VLSI-DAT, 2014)

Understanding soft errors in uncore components. - Hyungmin Cho; Chen-Yong Cher; Thomas Shepherd; Subhasish Mitra (DAC, 2015)

Clear: cross-layer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores. - Eric Cheng; Shahrzad Mirkhani; Lukasz G. Szafaryn; Chen-Yong Cher; Hyungmin Cho; Kevin Skadron; Mircea R. Stan; Klas Lilja; Jacob A. Abraham; Pradip Bose; Subhasish Mitra (DAC, 2016)

Cross-Layer Resilience in Low-Voltage Digital Systems: Key Insights. - Eric Cheng; Jacob A. Abraham; Pradip Bose; Alper Buyuktosunoglu; Keith A. Campbell; Deming Chen; Chen-Yong Cher; Hyungmin Cho; Binh Q. Le; Klas Lilja; Shahrzad Mirkhani; Kevin Skadron; et al. (ICCD, 2017)

System-Level Effects of Soft Errors in Uncore Components. - Hyungmin Cho; Eric Cheng; Thomas Shepherd; Chen-Yong Cher; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)

Transparent GPU memory management for DNNs. - Jung-Ho Park; Hyungmin Cho; Wookeun Jung; Jaejin Lee (PPoPP, 2018)

Impact of Microarchitectural Differences of RISC-V Processor Cores on Soft Error Effects. - Hyungmin Cho (IEEE Access, 2018)

ASIC-Resistance of Multi-Hash Proof-of-Work Mechanisms for Blockchain Consensus Protocols. - Hyungmin Cho (IEEE Access, 2018)

Tolerating Soft Errors in Processor Cores Using CLEAR (Cross-Layer Exploration for Architecting Resilience). - Eric Cheng; Shahrzad Mirkhani; Lukasz G. Szafaryn; Chen-Yong Cher; Hyungmin Cho; Kevin Skadron; Mircea R. Stan; Klas Lilja; Jacob A. Abraham; Pradip Bose; Subhasish Mitra (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

FA3C: FPGA-Accelerated Deep Reinforcement Learning. - Hyungmin Cho; Pyeongseok Oh; Jiyoung Park; Wookeun Jung; Jaejin Lee (ASPLOS, 2019)

Cross-Layer Resilience: Challenges, Insights, and the Road Ahead. - Eric Cheng; Daniel Mueller-Gritschneder; Jacob A. Abraham; Pradip Bose; Alper Buyuktosunoglu; Deming Chen; Hyungmin Cho; Yanjing Li; Uzair Sharif; Kevin Skadron; Mircea Stan; Ulf Schlichtmann; et al. (DAC, 2019)

Correction to "ASIC-Resistance of Multi-Hash Proof-of-Work Mechanisms for Blockchain Consensus Protocols". - Hyungmin Cho (IEEE Access, 2019)

Corrections to "Impact of Microarchitectural Differences of RISC-V Processor Cores on Soft Error Effects". - Hyungmin Cho (IEEE Access, 2019)

Modeling Application-Level Soft Error Effects for Single-Event Multi-Bit Upsets. - Hyungmin Cho; Kon-Woo Kwon (IEEE Access, 2019)

GPU-based acceleration of the Linear Complexity Test for random number generator testing. - HyungGyoon Kim; Hyungmin Cho; Changwoo Pyo (J. Parallel Distributed Comput., 2019)

SpecMCTS: Accelerating Monte Carlo Tree Search Using Speculative Tree Traversal. - Juhwan Kim; Byeongmin Kang; Hyungmin Cho (IEEE Access, 2021)

Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement. - Sung-Il Pae; Vivek Joy Kozhikkottu; Dinesh Somasekar; Wei Wu; Shankar Ganesh Ramasubramanian; Melin Dadual; Hyungmin Cho; Kon-Woo Kwon (IEEE Access, 2021)

RiSA: A Reinforced Systolic Array for Depthwise Convolutions and Embedded Tensor Reshaping. - Hyungmin Cho (ACM Trans. Embed. Comput. Syst., 2021)

Know Your Neighbor: Physically Locating Xeon Processor Cores on the Core Tile Grid. - Hyungmin Cho (DATE, 2022)

ES4D: Accelerating Exact Similarity Search for High-Dimensional Vectors via Vector Slicing and In-SSD Computation. - Juhwan Kim; Jongseon Seo; Jonghyeok Park; Sang-Won Lee 001; Hongchan Roh; Hyungmin Cho (ICCD, 2022)

FARNN: FPGA-GPU Hybrid Acceleration Platform for Recurrent Neural Networks. - Hyungmin Cho; Jeesoo Lee; Jaejin Lee (IEEE Trans. Parallel Distributed Syst., 2022)

FlexKA: A Flexible Karatsuba Multiplier Hardware Architecture for Variable-Sized Large Integers. - Byeongmin Kang; Hyungmin Cho (IEEE Access, 2023)

Generating Efficient Instruction Sequence for Software-Based Self-Testing of Processor Cores Using Reinforcement Learning. - Jongseon Seo; Hyungmin Cho (IEEE Access, 2024)

BiRD: Bi-Directional Input Reuse Dataflow for Enhancing Depthwise Convolution Performance on Systolic Arrays. - Mingeon Park; Seokjin Hwang; Hyungmin Cho (IEEE Trans. Computers, 2024)

SPARQ: An Accelerator Architecture for Large Language Models with Joint Sparsity and Quantization Techniques. - Seonggyu Choi; Hyungmin Cho (LCTES, 2025)

Detecting Cache-based Side-Channel Attacks by Leveraging Mesh Interconnect Traffic Monitoring. - Xingchao Bian; Hyungmin Cho (SAC, 2025)

CLEAR Cross-Layer Resilience: A Retrospective. - Eric Cheng; Hyungmin Cho; Shahrzad Mirkhani; Lukasz G. Szafaryn; Jacob A. Abraham; Pradip Bose; Chen-Yong Cher; Klas Lilja; Kevin Skadron; Mircea Stan; Subhasish Mitra (IEEE Des. Test, 2025)