A Comprehensive Power-Supply-Induced Jitter Mitigation Scheme for HBM Interfaces Using a Strobe-Triggered Digital LDO and Local Replica Regulators Achieving 10.7mV Voltage Droop and 1.4ns Settling Time. - Myeongho Han; Jaeho Kim; Hyunjun Song; Jaehyouk Choi (CICC, 2026)

A Command-Aware Hybrid LDO With Ultra-Small Voltage Droop and Fast Settling Time for Power-Supply-Induced Jitter Mitigation in HBM Interfaces. - Jaeho Kim; Myeongho Han; Hyunjun Song; Jooeun Bang; Younghyun Lim; Jaehyouk Choi (IEEE J. Solid State Circuits, 2026)