A 100Gb/s 1.6Vppd PAM-8 Transmitter with High-Swing 3+1 Hybrid FFE Taps in 40nm. - Jeonghyu Yang; Eunji Song; Seungwook Hong; Dongjun Lee; Sangwan Lee; Hyunwoo Im; Taeho Shin; Jaeduk Han (ISSCC, 2023)

A 35-Gb/s PAM-4 Transmitter With 7B4Q Full-Transition Avoidance and Area-Efficient Gm-Boosting Techniques. - Eunji Song; Jiyun Han; Hyeongmin Seo; Hyuntae Kim; Hyunwoo Im; Jaeduk Han (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 28-Gb/s Single-Ended PAM-4 Receiver With T-Coil-Integrated Continuous-Time Linear Equalizer in 40-nm CMOS Technology. - Taeyang Sim; Sun-Ho Yeom; Hyunwoo Im; Youngmin Oh; Hyeongmin Seo; Hyeongjun Ko; Hankyu Chi; Hae-Kang Jung; Jaeduk Han (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A 100-Gb/s PAM-8 Transmitter With 3-Tap FFE and High-Swing Hybrid Driver in 40-nm CMOS Technology. - Youngmin Oh; Hyunwoo Im; Jeonghyu Yang; Eunji Song; Dongjun Lee; Sangwan Lee; Taeho Shin; Jaeduk Han (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

100-112-Gb/s 1.6-Vppd PAM-8 Transmitters With High-Swing 3 + 1 Hybrid FFE Taps in 40-nm Technology. - Eunji Song; Jeonghyu Yang; Youngmin Oh; Seungwook Hong; Dongjun Lee; Sangwan Lee; Hyunwoo Im; Taeho Shin; Jaeduk Han (IEEE J. Solid State Circuits, 2025)