Economically Viable Automatic Insertion of Self-Test Features for Custom VLSI. - Mark Paraskeva; Anthony P. Ambler; D. F. Burrows; W. L. Knight; I. D. Dear (ITC, 1986)

Cost Analysis of Test Method Environments. - Chryssa Dislis; I. D. Dear; J. R. Miles; S. C. Lau; Anthony P. Ambler (ITC, 1989)

Economic Effects in Design and Test. - I. D. Dear; Chryssa Dislis; Anthony P. Ambler; J. H. Dick (IEEE Des. Test Comput., 1991)

Economics in Design and Test. - Chryssa Dislis; Anthony P. Ambler; I. D. Dear; J. H. Dick (ICCD, 1993)

Economics Modelling for the Determination of Test Strategies for Complex VLSI Boards. - Chryssa Dislis; J. H. Dick; I. D. Dear; I. N. Azu; Anthony P. Ambler (ITC, 1993)

Test strategy planning using economic analysis. - I. D. Dear; Chryssa Dislis; Anthony P. Ambler; J. H. Dick (J. Electron. Test., 1994)