A seamless handoff approach of Mobile IP protocol for mobile wireless data networks. - I-Wei Wu; Wen-Shiung Chen; Ho-En Liao; Fongray Frank Young (IEEE Trans. Consumer Electron., 2002)

Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer. - Bin-Hua Tein; I-Wei Wu; Chung-Ping Chung (CDES, 2006)

Instruction Set Extension Generation with Considering Physical Constraints. - I-Wei Wu; Shih-Chia Huang; Chung-Ping Chung; Jean Jyh-Jiun Shann (HiPEAC, 2007)

ETAHM: an energy-aware task allocation algorithm for heterogeneous multiprocessor. - Po-Chun Chang; I-Wei Wu; Jean Jyh-Jiun Shann; Chung-Ping Chung (DAC, 2008)

Instruction Set Extension Exploration in Multiple-Issue Architecture. - I-Wei Wu; Zhiyuan Chen; Jean Jyh-Jiun Shann; Chung-Ping Chung (DATE, 2008)

Reducing Code Size by Graph Coloring Register Allocation and Assignment Algorithm for Mixed-Width ISA Processor. - Jyh-Shian Wang; I-Wei Wu; Yu-Sheng Chen; Jean Jyh-Jiun Shann; Wei-Chung Hsu (CSE (2), 2009)

Reconfigurable custom functional unit generation and exploitation in multiple-issue processors. - Hui-Shan Wang; I-Wei Wu; Jean Jyh-Jiun Shann; Chung-Ping Chung (SASP, 2010)

Area-Efficient Instruction Set Extension Exploration with Hardware Design Space Exploration. - I-Wei Wu; Chung-Ping Chung; Jean Jyh-Jiun Shann (J. Inf. Sci. Eng., 2011)

Improving performance of JNA by using LLVM JIT compiler. - Yu-Hsin Tsai; I-Wei Wu; I-Chun Liu; Jean Jyh-Jiun Shann (ICIS, 2013)

Extended Instruction Exploration for Multiple-Issue Architectures. - I-Wei Wu; Jean Jyh-Jiun Shann; Wei-Chung Hsu; Chung-Ping Chung (ACM Trans. Embed. Comput. Syst., 2014)

Instruction Emulation and OS Supports of a Hybrid Binary Translator for x86 Instruction Set Architecture. - I-Chun Liu; I-Wei Wu; Jean Jyh-Jiun Shann (UIC/ATC/ScalCom, 2015)

Reconfigurable Custom Functional Unit Generation and Exploitation for Multiple-Issue Processors. - I-Wei Wu; Jean Jyh-Jiun Shann; Chung-Ping Chung (J. Inf. Sci. Eng., 2015)