Wafer-level electromigration for reliability monitoring: Quick-turn electromigration stress with correlation to package-level stress. - D. Slottke; R. J. Kamaladasa; M. Harmes; Ilan Tsameret; Mauro J. Kobrinsky; Timothy McMullen; John Dunklee (IRPS, 2015)

Reliability of dual-damascene local interconnects featuring cobalt on 10 nm logic technology. - F. Griggio; James Palmer 002; F. Pan; N. Toledo; Anthony Schmitz; Ilan Tsameret; R. Kasim; Gerald S. Leatherman; Jeffery Hicks; A. Madhavan; J. Shin; J. Steigerwald; et al. (IRPS, 2018)

Reliability Stressing Control Using Jacobian Feedback Kelvin Measurement on Intel Technologies. - Peng Xiao; Haris Hadziosmanovic; Rong Jiang; Misagh Rostami-asrabad; Stephen Ramey; Ilan Tsamaret (IRPS, 2020)

Machine Learning On Transistor Aging Data: Test Time Reduction and Modeling for Novel Devices. - Neel Chatterjee; John Ortega 002; Inanc Meric; Peng Xiao; Ilan Tsameret (IRPS, 2021)

Customized Parallel Reliability Testing Platform with Multifold Throughput Enhancement for Intel Stressing Tests. - Peng Xiao; Haris Hadziosmanovic; Michael Klessens; Rong Jiang; John Ortega 002; Daniel Schroeder; James Palmer 002; Ilan Tsameret (IRPS, 2021)