The Difference Fault Model : Using Functional Fault Simulation to Obtain Implementation Fault Coverage. - Gabriel M. Silberman; Ilan Y. Spillinger (ITC, 1986)

Improving the Performance of a Switch-Level Simulator Targeted for a Logic Simulation Machine. - Ilan Y. Spillinger; Gabriel M. Silberman (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1986)

Delay Test Generation 1: Concepts and Coverage Metrics. - Vijay S. Iyengar; Barry K. Rosen; Ilan Y. Spillinger (ITC, 1988)

Delay Test Generation 2: Algebra and Algorithms. - Vijay S. Iyengar; Barry K. Rosen; Ilan Y. Spillinger (ITC, 1988)

G-RIDDLE : A Formal Analysis of Logic Designs Condiucive to the Acceleration of Backtracing. - Gabriel M. Silberman; Ilan Y. Spillinger (ITC, 1988)

Architectural Improvements for Data-Driven VLSI Processing Arrays. - Shlomit Weiss; Ilan Y. Spillinger; Gabriel M. Silberman (FPCA, 1989)

Whistle: A Workbench for Test Development of Library-Based Designs. - Raphael Renous; Gabriel M. Silberman; Ilan Y. Spillinger (Computer, 1989)

Using functional fault simulation and the difference fault model to estimate implementation fault coverage. - Gabriel M. Silberman; Ilan Y. Spillinger (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1990)

Functional Fault Simulation as a Guide for Biased-Random Test Pattern Generation. - Gabriel M. Silberman; Ilan Y. Spillinger (IEEE Trans. Computers, 1991)

RIDDLE: A Foundation for Test Generation on a High-Level Design Description. - Gabriel M. Silberman; Ilan Y. Spillinger (IEEE Trans. Computers, 1991)

Linear test sequences for detecting functionally faulty RAM's. - Guy Even; Ophir Rachman; Ilan Y. Spillinger (Integr., 1993)

Architectural Improvement for a Data-Driven VLSI Processing Array. - Shlomit Weiss; Ilan Y. Spillinger; Gabriel M. Silberman (J. Parallel Distributed Comput., 1993)

A backtracing-oriented procedure for the analysis of combinational gate-level designs. - Gabriel M. Silberman; Ilan Y. Spillinger (Integr., 1994)

Performance Evaluation of a Decoded Instruction Cache for Variable Instruction Length Computers. - Gideon D. Intrater; Ilan Y. Spillinger (IEEE Trans. Computers, 1994)

Improving initialization through reversed retiming. - Leon Stok; Ilan Y. Spillinger; Guy Even (ED&TC, 1995)

Retiming revisited and reversed. - Guy Even; Ilan Y. Spillinger; Leon Stok (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1996)

Guest Editors' Introduction. - Ilan Y. Spillinger; Chris J. Newburn (J. Instr. Level Parallelism, 2000)