High-throughput bayesian computing machine with reconfigurable hardware. - Mingjie Lin; Ilia A. Lebedev; John Wawrzynek (FPGA, 2010)

OpenRCL: Low-Power High-Performance Computing with Reconfigurable Devices. - Mingjie Lin; Ilia A. Lebedev; John Wawrzynek (FPL, 2010)

MARC: A Many-Core Approach to Reconfigurable Computing. - Ilia A. Lebedev; Shaoyi Cheng; Austin Doupnik; James C. Martin; Christopher W. Fletcher; Daniel Burke; Mingjie Lin; John Wawrzynek (ReConFig, 2010)

Bridging the GPGPU-FPGA efficiency gap. - Christopher W. Fletcher; Ilia A. Lebedev; Narges Bani Asadi; Daniel Burke; John Wawrzynek (FPGA, 2011)

Brief announcement: distributed shared memory based on computation migration. - Mieszko Lis; Keun Sup Shim; Myong Hyon Cho; Christopher W. Fletcher; Michel A. Kinsy; Ilia A. Lebedev; Omer Khan; Srinivas Devadas (SPAA, 2011)

Exploring Many-Core Design Templates for FPGAs and ASICs. - Ilia A. Lebedev; Christopher W. Fletcher; Shaoyi Cheng; James C. Martin; Austin Doupnik; Daniel Burke; Mingjie Lin; John Wawrzynek (Int. J. Reconfigurable Comput., 2012)

Hardware-level thread migration in a 110-core shared-memory multiprocessor. - Mieszko Lis; Keun Sup Shim; Brandon Cho; Ilia A. Lebedev; Srinivas Devadas (Hot Chips Symposium, 2013)

Design tradeoffs for simplicity and efficient verification in the Execution Migration Machine. - Keun Sup Shim; Mieszko Lis; Myong Hyon Cho; Ilia A. Lebedev; Srinivas Devadas (ICCD, 2013)

Sanctum: Minimal RISC Extensions for Isolated Execution. - Victor Costan; Ilia A. Lebedev; Srinivas Devadas (IACR Cryptol. ePrint Arch., 2015)

Sanctum: Minimal Hardware Extensions for Strong Software Isolation. - Victor Costan; Ilia A. Lebedev; Srinivas Devadas (USENIX Security Symposium, 2016)

Leveraging Hardware Isolation for Process Level Access Control & Authentication. - Syed Kamran Haider; Hamza Omar; Ilia A. Lebedev; Srinivas Devadas; Marten van Dijk (SACMAT, 2017)

PriviPK: Certificate-less and secure email communication. - Mashael AlSabah; Alin Tomescu; Ilia A. Lebedev; Dimitrios N. Serpanos; Srinivas Devadas (Comput. Secur., 2017)

Secure Processors Part I: Background, Taxonomy for Secure Enclaves and Intel SGX Architecture. - Victor Costan; Ilia A. Lebedev; Srinivas Devadas (Found. Trends Electron. Des. Autom., 2017)

Secure Processors Part II: Intel SGX Security Analysis and MIT Sanctum Architecture. - Victor Costan; Ilia A. Lebedev; Srinivas Devadas (Found. Trends Electron. Des. Autom., 2017)

A Formal Foundation for Secure Remote Execution of Enclaves. - Pramod Subramanyan; Rohit Sinha 001; Ilia A. Lebedev; Srinivas Devadas; Sanjit A. Seshia (IACR Cryptol. ePrint Arch., 2017)

Mission Assurance: Beyond Secure Processing. - Michael Vai; David Whelihan; Jacob Leemaster; Haley Whitman; Willahelm Wan; Yunsi Fei; Roger Khazan; Ilia A. Lebedev; Kyle Hogan; Srinivas Devadas (QRS Companion, 2018)

DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors. - Vladimir Kiriansky; Ilia A. Lebedev; Saman P. Amarasinghe; Srinivas Devadas; Joel S. Emer (IACR Cryptol. ePrint Arch., 2018)

Secure Boot and Remote Attestation in the Sanctum Processor. - Ilia A. Lebedev; Kyle Hogan; Srinivas Devadas (IACR Cryptol. ePrint Arch., 2018)

MI6: Secure Enclaves in a Speculative Out-of-Order Processor. - Thomas Bourgeat; Ilia A. Lebedev; Andrew Wright; Sizhuo Zhang; Arvind 001; Srinivas Devadas (MICRO, 2019)

Sanctorum: A lightweight security monitor for secure enclaves. - Ilia A. Lebedev; Kyle Hogan; Jules Drean; David Kohlbrenner; Dayeol Lee; Krste Asanovic; Dawn Song; Srinivas Devadas (IACR Cryptol. ePrint Arch., 2019)