A scalable BIST architecture for delay faults. - Martin Keim; Ilia Polian; Harry Hengster; Bernd Becker 001 (ETW, 1999)

Efficient Pattern-Based Verification of Connections to IP Cores . - Ilia Polian; Wolfgang Günther 001; Bernd Becker 001 (Asian Test Symposium, 2001)

Efficient Pattern-Based Verification of Connections to Intellectual Property Cores. - Ilia Polian; Wolfgang Günther 001; Bernd Becker 001 (MBMV (1), 2001)

Exact Computation of Maximally Dominating Faults and Its Application to n-Detection Tests. - Ilia Polian; Irith Pomeranz; Bernd Becker 001 (Asian Test Symposium, 2002)

Stop & Go BIST. - Ilia Polian; Bernd Becker 001 (IOLTW, 2002)

Sequential n -Detection Criteria: Keep It Simple. - Ilia Polian; Martin Keim; Nicolai Mallig; Bernd Becker 001 (IOLTW, 2002)

Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics. - Ilia Polian; Piet Engelke; Bernd Becker 001 (ISMVL, 2002)

Evolutionary Optimization of Markov Sources for Pseudo Random Scan BIST. - Ilia Polian; Bernd Becker 001; Sudhakar M. Reddy (DATE, 2003)

On non-standard fault models for logic digital circuits. - Ilia Polian (Ausgezeichnete Informatikdissertationen, 2003)

The Case for 2-POF. - Ilia Polian; Wolfgang Günther 001; Bernd Becker 001 (MBMV, 2003)

Reducing ATE Cost in System-on-Chip Test. - Ilia Polian; Bernd Becker 001 (VLSI-SOC, 2003)

Simulating Realistic Bridging and Crosstalk Faults in an Industrial Setting. - Jonathan Bradford; Hartmut Delong; Ilia Polian; Bernd Becker 001 (J. Electron. Test., 2003)

Multiple Scan Chain Design for Two-Pattern Testing. - Ilia Polian; Bernd Becker 001 (J. Electron. Test., 2003)

Pattern-based verification of connections to intellectual property cores. - Ilia Polian; Wolfgang Günther 001; Bernd Becker 001 (Integr., 2003)

Testing for Missing-Gate Faults in Reversible Circuits. - John P. Hayes; Ilia Polian; Bernd Becker 001 (Asian Test Symposium, 2004)

X-Masking During Logic BIST and Its Impact on Defect Coverage. - Yuyi Tang; Hans-Joachim Wunderlich; Harald P. E. Vranken; Friedrich Hapke; Michael Wittke; Piet Engelke; Ilia Polian; Bernd Becker 001 (ITC, 2004)

Bounded Model Checking and Inductive Verification of Hybrid Discrete-continuous Systems. - Bernd Becker 001; Markus Behle; Friedrich Eisenbrand; Martin Fränzle; Marc Herbstritt; Christian Herde; Jörg Hoffmann 001; Daniel Kröning; Bernhard Nebel; Ilia Polian; Ralf Wimmer 001 (MBMV, 2004)

The Pros and Cons of Very-Low-Voltage Testing: An Analysis based on Resistive Bridging Faults. - Piet Engelke; Ilia Polian; Michel Renovell; Bharath Seshadri; Bernd Becker 001 (VTS, 2004)

Scalable Delay Fault BIST for Use with Low-Cost ATE. - Ilia Polian; Bernd Becker 001 (J. Electron. Test., 2004)

On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. - Sandip Kundu; Piet Engelke; Ilia Polian; Bernd Becker 001 (Asian Test Symposium, 2005)

A Family of Logical Fault Models for Reversible Circuits. - Ilia Polian; Thomas Fiehn; Bernd Becker 001; John P. Hayes (Asian Test Symposium, 2005)

Evolutionary Optimization in Code-Based Test Compression. - Ilia Polian; Alejandro Czutro; Bernd Becker 001 (DATE, 2005)

Transient fault characterization in dynamic noisy environments. - Ilia Polian; John P. Hayes; Sandip Kundu; Bernd Becker 001 (ITC, 2005)

Resistive Bridge Fault Model Evolution from Conventional to Ultra Deep Submicron Technologies. - Ilia Polian; Sandip Kundu; Jean-Marc Gallière; Piet Engelke; Michel Renovell; Bernd Becker 001 (VTS, 2005)

Modeling Feedback Bridging Faults with Non-Zero Resistance. - Ilia Polian; Piet Engelke; Michel Renovell; Bernd Becker 001 (J. Electron. Test., 2005)

Nichtstandardfehlermodelle für digitale Logikschaltkreise: Simulation, prüfgerechter Entwurf, industrielle Anwendungen (On Non-standard Fault Models for Logic Digital Circuits: Simulation, Design for Testability, Industrial Applications). - Ilia Polian (it Inf. Technol., 2005)

Delta-IDDQ Testing of Resistive Short Defects. - Piet Engelke; Ilia Polian; Hans Manhaeve; Michel Renovell; Bernd Becker 001 (ATS, 2006)

A Specific ATPG technique for Resistive Open with Sequence Recursive Dependency. - Michel Renovell; Mariane Comte; Ilia Polian; Piet Engelke; Bernd Becker 001 (ATS, 2006)

Automatic Identification of Timing Anomalies for Cycle-Accurate Worst-Case Execution Time Analysis. - Jochen Eisinger; Ilia Polian; Bernd Becker 001; Alexander Metzner; Stephan Thesing; Reinhard Wilhelm (DDECS, 2006)

Low-Cost Hardening of Image Processing Applications Against Soft Errors. - Ilia Polian; Bernd Becker 001; Masato Nakasato; Satoshi Ohtake; Hideo Fujiwara (DFT, 2006)

An Improved Technique for Reducing False Alarms Due to Soft Errors. - Sandip Kundu; Ilia Polian (IOLTS, 2006)

A Definition and Classification of Timing Anomalies. - Jan Reineke 001; Björn Wachter; Stephan Thesing; Reinhard Wilhelm; Ilia Polian; Jochen Eisinger; Bernd Becker 001 (WCET, 2006)

Automatic Test Pattern Generation for Resistive Bridging Faults. - Piet Engelke; Ilia Polian; Michel Renovell; Bernd Becker 001 (J. Electron. Test., 2006)

DFG-Projekt RealTest - Test und Zuverlässigkeit nanoelektronischer Systeme (DFG-Project - Test and Reliability of Nano-Electronic Systems). - Bernd Becker 001; Ilia Polian; Sybille Hellebrand; Bernd Straube; Hans-Joachim Wunderlich (it Inf. Technol., 2006)

Simulating Resistive-Bridging and Stuck-At Faults. - Piet Engelke; Ilia Polian; Michel Renovell; Bernd Becker 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

X-masking during logic BIST and its impact on defect coverage. - Yuyi Tang; Hans-Joachim Wunderlich; Piet Engelke; Ilia Polian; Bernd Becker 001; Jürgen Schlöffel; Friedrich Hapke; Michael Wittke (IEEE Trans. Very Large Scale Integr. Syst., 2006)

SUPERB: Simulator Utilizing Parallel Evaluation of Resistive Bridges. - Piet Engelke; Bettina Braitling; Ilia Polian; Michel Renovell; Bernd Becker 001 (ATS, 2007)

Simulating Open-Via Defects. - Stefan Spinner; Jie Jiang 018; Ilia Polian; Piet Engelke; Bernd Becker 001 (ATS, 2007)

Identification of Critical Errors in Imaging Applications. - Ilia Polian; Damian Nowroth; Bernd Becker 001 (IOLTS, 2007)

An Analysis Framework for Transient-Error Tolerance. - John P. Hayes; Ilia Polian; Bernd Becker 001 (VTS, 2007)

Electromechanical Reliability Testing of Three-Axial Silicon Force Sensors - Stefan Spinner; Julian Bartholomeyczik; Bernd Becker 001; Michael Doelle; Oliver Paul; Ilia Polian; Roland Roth; Karl Seitz; Patrick Ruther (CoRR, 2007)

Power Droop Testing. - Ilia Polian; Alejandro Czutro; Sandip Kundu; Bernd Becker 001 (IEEE Des. Test Comput., 2007)

Functional Constraints vs. Test Compression in Scan-Based Delay Testing. - Ilia Polian; Hideo Fujiwara (J. Electron. Test., 2007)

Resistive Bridging Fault Simulation of Industrial Circuits. - Piet Engelke; Ilia Polian; Jürgen Schlöffel; Bernd Becker 001 (DATE, 2008)

Diagnosis of Realistic Defects Based on the X-Fault Model. - Ilia Polian; Kohei Miyase; Yusuke Nakamura; Seiji Kajihara; Piet Engelke; Bernd Becker 001; Stefan Spinner; Xiaoqing Wen (DDECS, 2008)

Selective Hardening of NanoPLA Circuits. - Ilia Polian; Wenjing Rao (DFT, 2008)

On Reducing Circuit Malfunctions Caused by Soft Errors. - Ilia Polian; Sudhakar M. Reddy; Irith Pomeranz; Xun Tang; Bernd Becker 001 (DFT, 2008)

A study of cognitive resilience in a JPEG compressor. - Damian Nowroth; Ilia Polian; Bernd Becker 001 (DSN, 2008)

A Simulator of Small-Delay Faults Caused by Resistive-Open Defects. - Alejandro Czutro; Nicolas Houarche; Piet Engelke; Ilia Polian; Mariane Comte; Michel Renovell; Bernd Becker 001 (ETS, 2008)

Selective Hardening in Early Design Steps. - Christian G. Zoellin; Hans-Joachim Wunderlich; Ilia Polian; Bernd Becker 001 (ETS, 2008)

Scalable Calculation of Logical Masking Effects for Selective Hardening Against Soft Errors. - Ilia Polian; Sudhakar M. Reddy; Bernd Becker 001 (ISVLSI, 2008)

Extraction, Simulation and Test Generation for Interconnect Open Defects Based on Enhanced Aggressor-Victim Model. - Stefan Hillebrecht; Ilia Polian; Piet Engelke; Bernd Becker 001; Martin Keim; Wu-Tung Cheng (ITC, 2008)

Automatic Test Pattern Generation for Interconnect Open Defects. - Stefan Spinner; Ilia Polian; Piet Engelke; Bernd Becker 001; Martin Keim; Wu-Tung Cheng (VTS, 2008)

On Detection of Resistive Bridging Defects by Low-Temperature and Low-Voltage Testing. - Piet Engelke; Ilia Polian; Michel Renovell; Sandip Kundu; Bharath Seshadri; Bernd Becker 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Dynamic Compaction in SAT-Based ATPG. - Alejandro Czutro; Ilia Polian; Piet Engelke; Sudhakar M. Reddy; Bernd Becker 001 (Asian Test Symposium, 2009)

Analysis and optimization of fault-tolerant embedded systems with hardened processors. - Viacheslav Izosimov; Ilia Polian; Paul Pop; Petru Eles; Zebo Peng (DATE, 2009)

Reducing temperature variability by routing heat pipes. - Kunal P. Ganeshpure; Ilia Polian; Sandip Kundu; Bernd Becker 001 (ACM Great Lakes Symposium on VLSI, 2009)

ATPG-based grading of strong fault-secureness. - Marc Hunger; Sybille Hellebrand; Alejandro Czutro; Ilia Polian; Bernd Becker 001 (IOLTS, 2009)

TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis. - Alejandro Czutro; Ilia Polian; Matthew Lewis 004; Piet Engelke; Sudhakar M. Reddy; Bernd Becker 001 (VLSI Design, 2009)

An Electrical Model for the Fault Simulation of Small Delay Faults Caused by Crosstalk Aggravated Resistive Short Defects. - Nicolas Houarche; Mariane Comte; Michel Renovell; Alejandro Czutro; Piet Engelke; Ilia Polian; Bernd Becker 001 (VTS, 2009)

SUPERB: Simulator utilizing parallel evaluation of resistive bridges. - Piet Engelke; Bernd Becker 001; Michel Renovell; Jürgen Schlöffel; Bettina Braitling; Ilia Polian (ACM Trans. Design Autom. Electr. Syst., 2009)

Massive statistical process variations: A grand challenge for testing nanoelectronic circuits. - Bernd Becker 001; Sybille Hellebrand; Ilia Polian; Bernd Straube; Wolfgang Vermeiren; Hans-Joachim Wunderlich (DSN Workshops, 2010)

Advanced modeling of faults in Reversible circuits. - Ilia Polian; John P. Hayes (EWDTS, 2010)

Special session 4B: Panel low-power test and noise-aware test: Foes or friends? - Ilia Polian (VTS, 2010)

Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability Analysis. - Alejandro Czutro; Ilia Polian; Matthew Lewis 004; Piet Engelke; Sudhakar M. Reddy; Bernd Becker 001 (Int. J. Parallel Program., 2010)

Fault Models and Test Algorithms for Nanoscale Technologies (Fehlermodelle und Testalgorithmen für Nanoscale-Technologien). - Ilia Polian; Bernd Becker 001 (it Inf. Technol., 2010)

Power Supply Noise: Causes, Effects, and Testing. - Ilia Polian (J. Low Power Electron., 2010)

Efficient SAT-Based Search for Longest Sensitisable Paths. - Matthias Sauer 002; Jie Jiang 018; Alejandro Czutro; Ilia Polian; Bernd Becker 001 (Asian Test Symposium, 2011)

Adaptive voltage over-scaling for resilient applications. - Philipp Klaus Krause; Ilia Polian (DATE, 2011)

SAT-based analysis of sensitisable paths. - Matthias Sauer 002; Alexander Czutro; Tobias Schubert 001; Stefan Hillebrecht; Ilia Polian; Bernd Becker 001 (DDECS, 2011)

Tomographic Testing and Validation of Probabilistic Circuits. - Alexandru Paler; Armin Alaghi; Ilia Polian; John P. Hayes (ETS, 2011)

Towards Variation-Aware Test Methods. - Ilia Polian; Bernd Becker 001; Sybille Hellebrand; Hans-Joachim Wunderlich; Peter C. Maxwell (ETS, 2011)

Estimation of component criticality in early design steps. - Matthias Sauer 002; Alejandro Czutro; Ilia Polian; Bernd Becker 001 (IOLTS, 2011)

An FPGA-based framework for run-time injection and analysis of soft errors in microprocessors. - Matthias Sauer 002; Victor Tomashevich; Jörg Müller 004; Matthew Lewis 004; Andreas Spilla; Ilia Polian; Bernd Becker 001; Wolfram Burgard (IOLTS, 2011)

Variation-aware fault modeling. - Fabian Hopsch; Bernd Becker 001; Sybille Hellebrand; Ilia Polian; Bernd Straube; Wolfgang Vermeiren; Hans-Joachim Wunderlich (Sci. China Inf. Sci., 2011)

Selective Hardening: Toward Cost-Effective Error Tolerance. - Ilia Polian; John P. Hayes (IEEE Des. Test Comput., 2011)

Modeling and Mitigating Transient Errors in Logic Circuits. - Ilia Polian; John P. Hayes; Sudhakar M. Reddy; Bernd Becker 001 (IEEE Trans. Dependable Secur. Comput., 2011)

Detection and diagnosis of faulty quantum circuits. - Alexandru Paler; Ilia Polian; John P. Hayes (ASP-DAC, 2012)

Variation-Aware Fault Grading. - Alexander Czutro; Michael E. Imhof; J. Jiang; Abdullah Mumtaz; Matthias Sauer 002; Bernd Becker 001; Ilia Polian; Hans-Joachim Wunderlich (Asian Test Symposium, 2012)

Session Summary I: Quantum informatics: Classical circuit synthesis, resource optimisation and benchmarking. - Ilia Polian (Asian Test Symposium, 2012)

A Fault Attack on the LED Block Cipher. - Philipp Jovanovic; Martin Kreuzer; Ilia Polian (COSADE, 2012)

On the optimality of K longest path generation algorithm under memory constraints. - Jie Jiang 018; Matthias Sauer 002; Alexander Czutro; Bernd Becker 001; Ilia Polian (DATE, 2012)

#SAT-based vulnerability analysis of security components - A case study. - Linus Feiten; Matthias Sauer 002; Tobias Schubert 001; Alexander Czutro; Eberhard Böhl; Ilia Polian; Bernd Becker 001 (DFT, 2012)

Multi-conditional SAT-ATPG for power-droop testing. - Alexander Czutro; Matthias Sauer 002; Ilia Polian; Bernd Becker 001 (ETS, 2012)

On the quality of test vectors for post-silicon characterization. - Matthias Sauer 002; Alexander Czutro; Bernd Becker 001; Ilia Polian (ETS, 2012)

Small-delay-fault ATPG with waveform accuracy. - Matthias Sauer 002; Alexander Czutro; Ilia Polian; Bernd Becker 001 (ICCAD, 2012)

Cross-level protection of circuits against faults and malicious attacks. - Victor Tomashevich; Sudarshan Srinivasan; Fabian Foerg; Ilia Polian (IOLTS, 2012)

Functional test of small-delay faults using SAT and Craig interpolation. - Matthias Sauer 002; Stefan Kupferschmid; Alexander Czutro; Ilia Polian; Sudhakar M. Reddy; Bernd Becker 001 (ITC, 2012)

Synthesis of topological quantum circuits. - Alexandru Paler; Simon J. Devitt; Kae Nemoto; Ilia Polian (NANOARCH, 2012)

SAT-ATPG using preferences for improved detection of complex defect mechanisms. - Alexander Czutro; Matthias Sauer 002; Tobias Schubert 001; Ilia Polian; Bernd Becker 001 (VTS, 2012)

An Algebraic Fault Attack on the LED Block Cipher. - Philipp Jovanovic; Martin Kreuzer; Ilia Polian (IACR Cryptol. ePrint Arch., 2012)

Provably optimal test cube generation using quantified boolean formula solving. - Matthias Sauer 002; Sven Reimer; Ilia Polian; Tobias Schubert 001; Bernd Becker 001 (ASP-DAC, 2013)

MIRID: Mixed-Mode IR-Drop Induced Delay Simulator. - Jie Jiang 018; Marina Aparicio; Mariane Comte; Florence Azaïs; Michel Renovell; Ilia Polian (Asian Test Symposium, 2013)

Efficient SAT-based dynamic compaction and relaxation for longest sensitizable paths. - Matthias Sauer 002; Sven Reimer; Tobias Schubert 001; Ilia Polian; Bernd Becker 001 (DATE, 2013)

Fault-based attacks on cryptographic hardware. - Ilia Polian; Martin Kreuzer (DDECS, 2013)

Approximate simulation of circuits with probabilistic behavior. - Alexandru Paler; Josef Kinseher; Ilia Polian; John P. Hayes (DFTS, 2013)

Pre-characterization procedure for a mixed mode simulation of IR-drop induced delays. - Marina Aparicio; Mariane Comte; Florence Azaïs; Michel Renovell; Jie Jiang 018; Ilia Polian; Bernd Becker 001 (LATW, 2013)

Special session 12A: Hot topic counterfeit IC identification: How can test help? - Ilia Polian; Mohammad Tehranipoor (VTS, 2013)

SAT-Based Analysis of Sensitizable Paths. - Matthias Sauer 002; Alexander Czutro; Tobias Schubert 001; Stefan Hillebrecht; Ilia Polian; Bernd Becker 001 (IEEE Des. Test, 2013)

Multi-Stage Fault Attacks on Block Ciphers. - Philipp Jovanovic; Martin Kreuzer; Ilia Polian (IACR Cryptol. ePrint Arch., 2013)

Technische Informatik in der universitären Lehre: Bestandsaufnahme, Herausforderungen, Perspektiven. - Ilia Polian (Aspekte der Technischen Informatik, 2014)

Software-based Pauli tracking in fault-tolerant quantum circuits. - Alexandru Paler; Simon J. Devitt; Kae Nemoto; Ilia Polian (DATE, 2014)

A new architecture for minimum mean square error sorted QR decomposition for MIMO wireless communication systems. - Victor Tomashevich; Christina Gimmler-Dumont; Christian Fesl; Norbert Wehn; Ilia Polian (DDECS, 2014)

Protecting cryptographic hardware against malicious attacks by nonlinear robust codes. - Victor Tomashevich; Yaara Neumeier; Raghavan Kumar; Osnat Keren; Ilia Polian (DFT, 2014)

Detection conditions for errors in self-adaptive better-than-worst-case designs. - Ilia Polian; Jie Jiang 018; Adit D. Singh (ETS, 2014)

Variation-aware deterministic ATPG. - Matthias Sauer 002; Ilia Polian; Michael E. Imhof; Abdullah Mumtaz; Eric Schneider; Alexander Czutro; Hans-Joachim Wunderlich; Bernd Becker 001 (ETS, 2014)

Cross-Level Validation of Topological Quantum Circuits. - Alexandru Paler; Simon J. Devitt; Kae Nemoto; Ilia Polian (RC, 2014)

SAT-Based Test Pattern Generation with Improved Dynamic Compaction. - Alexander Czutro; Sudhakar M. Reddy; Ilia Polian; Bernd Becker 001 (VLSID, 2014)

Better-than-Worst-Case Timing Design with Latch Buffers on Short Paths. - Ravi Kanth Uppu; Ravi Tej Uppu; Adit D. Singh; Ilia Polian (VLSID, 2014)

Reliability analysis of MIMO channel preprocessing by fault injection. - Victor Tomashevich; Christina Gimmler-Dumont; Norbert Wehn; Ilia Polian (WiSEE, 2014)

Parametric Trojans for Fault-Injection Attacks on Cryptographic Hardware. - Raghavan Kumar; Philipp Jovanovic; Wayne P. Burleson; Ilia Polian (IACR Cryptol. ePrint Arch., 2014)

Precise Fault-Injections using Voltage and Temperature Manipulation for Differential Cryptanalysis. - Raghavan Kumar; Philipp Jovanovic; Ilia Polian (IACR Cryptol. ePrint Arch., 2014)

Guest Editorial. - Ilia Polian; Mohammad Tehranipoor (IET Comput. Digit. Tech., 2014)

Hardware security and test: Friends or enemies? - Ilia Polian (it Inf. Technol., 2014)

On the Use of Assist Circuits for Improved Coupling Fault Detection in SRAMs. - Josef Kinseher; Leonardo Bonet Zordan; Ilia Polian (ATS, 2015)

Design automation challenges for scalable quantum architectures. - Ilia Polian; Austin G. Fowler (DAC, 2015)

Fault-based attacks on the Bel-T block cipher family. - Philipp Jovanovic; Ilia Polian (DATE, 2015)

A Fully Fault-Tolerant Representation of Quantum Circuits. - Alexandru Paler; Ilia Polian; Kae Nemoto; Simon J. Devitt (RC, 2015)

Formal Vulnerability Analysis of Security Components. - Linus Feiten; Matthias Sauer 002; Tobias Schubert 001; Victor Tomashevich; Ilia Polian; Bernd Becker 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2015)

On Optimal Power-Aware Path Sensitization. - Matthias Sauer 002; Jie Jiang 018; Sven Reimer; Kohei Miyase; Xiaoqing Wen; Bernd Becker 001; Ilia Polian (ATS, 2016)

Improving SRAM test quality by leveraging self-timed circuits. - Josef Kinseher; Leonardo Bonet Zordan; Ilia Polian; Andreas Leininger (DATE, 2016)

Failure mechanisms and test methods for the SRAM TVC write-assist technique. - Josef Kinseher; Moritz Völker; Leonardo Bonet Zordan; Ilia Polian (ETS, 2016)

Memory error resilient detection for massive MIMO systems. - Victor Tomashevich; Ilia Polian (EUSIPCO, 2016)

Detection Performance of MIMO Unique Word OFDM. - Victor Tomashevich; Ilia Polian (WSA, 2016)

Hardware Security (Dagstuhl Seminar 16202). - Osnat Keren; Ilia Polian; Mark Tehranipoor (Dagstuhl Reports, 2016)

PHAETON: A SAT-Based Framework for Timing-Aware Path Sensitization. - Matthias Sauer 002; Bernd Becker 001; Ilia Polian (IEEE Trans. Computers, 2016)

Securing the hardware of cyber-physical systems. - Francesco Regazzoni 001; Ilia Polian (ASP-DAC, 2017)

Analyzing the effects of peripheral circuit aging of embedded SRAM architectures. - Josef Kinseher; Leonhard Heis; Ilia Polian (DATE, 2017)

Sensitized path PUF: A lightweight embedded physical unclonable function. - Matthias Sauer 002; Pascal Raiola; Linus Feiten; Bernd Becker 001; Ulrich Rührmair; Ilia Polian (DATE, 2017)

Building a Better Random Number Generator for Stochastic Computing. - Florian Neugebauer; Ilia Polian; John P. Hayes (DSD, 2017)

Counteracting malicious faults in cryptographic circuits. - Ilia Polian; Francesco Regazzoni 001 (ETS, 2017)

AutoFault: Towards Automatic Construction of Algebraic Fault Attacks. - Jan Burchard; Mael Gay; Ange-Salomé Messeng Ekossono; Jan Horácek; Bernd Becker 001; Tobias Schubert 001; Martin Kreuzer; Ilia Polian (FDTC, 2017)

Towards mixed structural-functional models for algebraic fault attacks on ciphers. - Jan Burchard; Ange-Salomé Messeng Ekossono; Jan Horácek; Mael Gay; Bernd Becker 001; Tobias Schubert 001; Martin Kreuzer; Ilia Polian (IVSW, 2017)

Introduction to hardware-oriented security for MPSoCs. - Ilia Polian; Francesco Regazzoni 001; Johanna Sepúlveda (SoCC, 2017)

Detection and Correction of Malicious and Natural Faults in Cryptographic Modules. - Batya Karp; Maël Gay; Osnat Keren; Ilia Polian (PROOFS, 2018)

Security-oriented Code-based Architectures for Mitigating Fault Attacks. - Batya Karp; Mael Gay; Osnat Keren; Ilia Polian (DCIS, 2018)

Hardware-oriented Security in a Computer Science Curriculum. - Ilia Polian; Mael Gay (EWME, 2018)

Security: the dark side of approximate computing? - Francesco Regazzoni 001; Cesare Alippi; Ilia Polian (ICCAD, 2018)

Quantum era challenges for classical computers. - Francesco Regazzoni 001; Austin G. Fowler; Ilia Polian (SAMOS, 2018)

Test and Reliability Challenges for Approximate Circuitry. - Ilia Polian (IEEE Embed. Syst. Lett., 2018)

Framework for Quantifying and Managing Accuracy in Stochastic Circuit Design. - Florian Neugebauer; Ilia Polian; John P. Hayes (ACM J. Emerg. Technol. Comput. Syst., 2018)

S-box-based random number generation for stochastic computing. - Florian Neugebauer; Ilia Polian; John P. Hayes (Microprocess. Microsystems, 2018)

On the maximum function in stochastic computing. - Florian Neugebauer; Ilia Polian; John P. Hayes (CF, 2019)

Security in Autonomous Systems. - Stefan Katzenbeisser 001; Ilia Polian; Francesco Regazzoni 001; Marc Stöttinger (ETS, 2019)

Hardware-Oriented Algebraic Fault Attack Framework with Multiple Fault Injection Support. - Maël Gay; Tobias Paxian; Devanshi Upadhyaya; Bernd Becker 001; Ilia Polian (FDTC, 2019)

On the Limits of Stochastic Computing. - Florian Neugebauer; Ilia Polian; John P. Hayes (ICRC, 2019)

Electroforming-free Memristors for Hardware Security Primitives. - Nan Du 004; Mahdi Kiani; Xianyue Zhao; Danilo Bürger; Oliver G. Schmidt; Ramona Ecke; Stefan E. Schulz; Heidemarie Schmidt; Ilia Polian (IVSW, 2019)

Fault Attacks on Cryptographic Circuits. - Ilia Polian (NEWCAS, 2019)

A comment on information leakage from robust code-based checkers detecting fault attacks on cryptographic primitives. - Osnat Keren; Ilia Polian (PROOFS, 2019)

Fault Sensitivity Analysis of Lattice-Based Post-Quantum Cryptographic Components. - Felipe Valencia; Ilia Polian; Francesco Regazzoni 001 (SAMOS, 2019)

Secure Composition for Hardware Systems (Dagstuhl Seminar 19301). - Divya Arora 001; Ilia Polian; Francesco Regazzoni 001; Patrick Schaumont (Dagstuhl Reports, 2019)

Toward Error-Correcting Architectures for Cryptographic Circuits Based on Rabii-Keren Codes. - Mael Gay; Batya Karp; Osnat Keren; Ilia Polian (IEEE Embed. Syst. Lett., 2019)

Hardware-oriented security. - Ilia Polian (it Inf. Technol., 2019)

Improving Testability and Reliability of Advanced SRAM Architectures. - Josef Kinseher; Moritz Völker; Ilia Polian (IEEE Trans. Emerg. Top. Comput., 2019)

Exploring the Mysteries of System-Level Test. - Ilia Polian; Jens Anders; Steffen Becker 001; Paolo Bernardi; Krishnendu Chakrabarty; Nourhan Elhamawy; Matthias Sauer 002; Adit D. Singh; Matteo Sonza Reorda; Stefan Wagner 001 (ATS, 2020)

Towards Secure Composition of Integrated Circuits and Electronic Systems: On the Role of EDA. - Johann Knechtel; Elif Bilge Kavun; Francesco Regazzoni 001; Annelie Heuser; Anupam Chattopadhyay; Debdeep Mukhopadhyay; Soumyajit Dey; Yunsi Fei; Yaacov Belenky; Itamar Levi; Tim Güneysu; Patrick Schaumont; et al. (DATE, 2020)

Side Channel Attacks vs Approximate Computing. - Francesco Regazzoni 001; Ilia Polian (ACM Great Lakes Symposium on VLSI, 2020)

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. - Francesco Regazzoni 001; Shivam Bhasin; Amir Alipour; Ihab Alshaer; Furkan Aydin; Aydin Aysu; Vincent Beroulle; Giorgio Di Natale; Paul D. Franzon; David Hély; Naofumi Homma; Akira Ito 002; et al. (ICCAD, 2020)

Hardware-based Fast Real-time Image Classification with Stochastic Computing. - Ponnanna Kelettira Muthappa; Florian Neugebauer; Ilia Polian; John P. Hayes (ICCD, 2020)

An Open-Source Area-Optimized ECEG Cryptosystem in Hardware. - Nourhan Elhamawy; Maël Gay; Ilia Polian (ISVLSI, 2020)

Retraining and Regularization to Optimize Neural Networks for Stochastic Computing. - Junseok Oh; Florian Neugebauer; Ilia Polian; John P. Hayes (ISVLSI, 2020)

Detection of Malicious Spatial-Domain Steganography over Noisy Channels Using Convolutional Neural Networks. - Swaroop Shankar Prasad; Ofer Hadar; Ilia Polian (Media Watermarking, Security, and Forensics, 2020)

Error control scheme for malicious and natural faults in cryptographic modules. - Mael Gay; Batya Karp; Osnat Keren; Ilia Polian (J. Cryptogr. Eng., 2020)

On resilience of security-oriented error detecting architectures against power attacks: a theoretical analysis. - Osnat Keren; Ilia Polian (CF, 2021)

Nano Security: From Nano-Electronics to Secure Systems. - Ilia Polian; Frank Altmann; Tolga Arul; Christian Boit; Ralf Brederlow; Lucas Davi; Rolf Drechsler; Nan Du 004; Thomas Eisenbarth 001; Tim Güneysu; Sascha Hermann; Matthias Hiller; et al. (DATE, 2021)

Extending Circuit Design Flow for Early Assessment of Fault Attack Vulnerabilities. - Felipe Valencia; Ilia Polian; Francesco Regazzoni 001 (DSD, 2021)

Security, Reliability and Test Aspects of the RISC-V Ecosystem. - Jaume Abella 001; Sergi Alcaide; Jens Anders; Francisco Bas; Steffen Becker 001; Elke De Mulder; Nourhan Elhamawy; Frank K. Gürkaynak; Helena Handschuh; Carles Hernández 001; Michael Hutter; Leonidas Kosmidis; et al. (ETS, 2021)

ArsoNISQ: Analyzing Quantum Algorithms on Near-Term Architectures. - Sebastian Brandhofer; Simon J. Devitt; Ilia Polian (ETS, 2021)

Optimal Mapping for Near-Term Quantum Architectures based on Rydberg Atoms. - Sebastian Brandhofer; Ilia Polian; Hans Peter Büchler (ICCAD, 2021)

System-Level Test: State of the Art and Challenges. - Davide Appello; H. H. Chen; Matthias Sauer 002; Ilia Polian; Paolo Bernardi; Matteo Sonza Reorda (IOLTS, 2021)

Error Analysis of the Variational Quantum Eigensolver Algorithm. - Sebastian Brandhofer; Simon J. Devitt; Ilia Polian (NANOARCH, 2021)

Towards Reliable In-Memory Computing: From Emerging Devices to Post-von-Neumann Architectures. - Hussam Amrouch; Nan Du 004; Anteneh Gebregiorgis; Said Hamdioui; Ilia Polian (VLSI-SoC, 2021)

Special Session: Machine Learning for Semiconductor Test and Reliability. - Hussam Amrouch; Animesh Basak Chowdhury; Wentian Jin; Ramesh Karri; Farshad Khorrami; Prashanth Krishnamurthy; Ilia Polian; Victor M. van Santen; Benjamin Tan 001; Sheldon X.-D. Tan (VTS, 2021)

Special Session: Noisy Intermediate-Scale Quantum (NISQ) Computers - How They Work, How They Fail, How to Test Them? - Sebastian Brandhofer; Simon J. Devitt; Thomas Wellens; Ilia Polian (VTS, 2021)

Protecting artificial intelligence IPs: a survey of watermarking and fingerprinting for machine learning. - Francesco Regazzoni 001; Paolo Palmieri 001; Fethulah Smailbegovic; Rosario Cammarota; Ilia Polian (CAAI Trans. Intell. Technol., 2021)

Guest Editors' Introduction: Stochastic Computing for Neuromorphic Applications. - Ilia Polian; John P. Hayes; Vincent T. Lee; Weikang Qian (IEEE Des. Test, 2021)

IPM-RED: combining higher-order masking with robust error detection. - Osnat Keren; Ilia Polian (J. Cryptogr. Eng., 2021)

Introduction to the Special Issue on Emerging Challenges and Solutions in Hardware Security. - Domenic Forte; Debdeep Mukhopadhyay; Ilia Polian; Yunsi Fei; Rosario Cammarota (ACM J. Emerg. Technol. Comput. Syst., 2021)

On the Limitations of Logic Locking the Approximate Circuits. - Kartik Nayak; Devanshi Upadhyaya; Francesco Regazzoni 001; Ilia Polian (AsianHOST, 2022)

Intelligent Methods for Test and Reliability. - Hussam Amrouch; Jens Anders; Steffen Becker 001; Maik Betka; Gerd Bleher; Peter Domanski; Nourhan Elhamawy; Thomas Ertl; Athanasios Gatzastras; Paul R. Genssler; Sebastian Hasler; Martin Heinrich; et al. (DATE, 2022)

Stochastic Computing Architectures for Lightweight LSTM Neural Networks. - Roshwin Sengupta; Ilia Polian; John P. Hayes (DDECS, 2022)

Machine Learning for Test, Diagnosis, Post-Silicon Validation and Yield Optimization. - Hussam Amrouch; Krishnendu Chakrabarty; Dirk Pflüger; Ilia Polian; Matthias Sauer 002; Matteo Sonza Reorda (ETS, 2022)

On the Impact of Hardware Timing Errors on Stochastic Computing based Neural Networks. - Florian Neugebauer; Stefan Holst; Ilia Polian (ETS, 2022)

Human vs. Automatic Detection of Deepfake Videos Over Noisy Channels. - Swaroop Shankar Prasad; Ofer Hadar; Thang Vu; Ilia Polian (ICME, 2022)

Wavelet Transform Assisted Neural Networks for Human Activity Recognition. - Roshwin Sengupta; Ilia Polian; John P. Hayes (ISCAS, 2022)

Calibration-Aware Transpilation for Variational Quantum Optimization. - Yanjun Ji 001; Sebastian Brandhofer; Ilia Polian (QCE, 2022)

Physics inspired compact modelling of BiFeO$_3$ based memristors for hardware security applications. - Sahitya Yarragolla; Nan Du 004; Torben Hemke; Xianyue Zhao; Ziang Chen; Ilia Polian; Thomas Mussenbrock (CoRR, 2022)

Side-channel Attacks on Memristive Circuits Under External Disturbances. - Li-Wei Chen 001; Xianyue Zhao; Ziang Chen; Nan Du 004; Ilia Polian (ATS, 2023)

A Modular Open-Source Cryptographic Co-Processor for Internet of Things. - Dina Hesse; Maël Gay; Ilia Polian; Elif Bilge Kavun; Owen Millwood; Witali Bartsch (DSD, 2023)

Stochastic Computing as a Defence Against Adversarial Attacks. - Florian Neugebauer; Vivek Vekariya; Ilia Polian; John P. Hayes (DSN-W, 2023)

A Survey of Recent Developments in Testability, Safety and Security of RISC-V Processors. - Jens Anders; Pablo Andreu; Bernd Becker 001; Steffen Becker 001; Riccardo Cantoro; Nikolaos Ioannis Deligiannis; Nourhan Elhamawy; Tobias Faller; Carles Hernández 001; Nele Mentens; Mahnaz Namazi Rizi; Ilia Polian; et al. (ETS, 2023)

Secrets Leaking Through Quicksand: Covert Channels in Approximate Computing. - Lorenzo Masciullo; Roberto Passerone; Francesco Regazzoni 001; Ilia Polian (ETS, 2023)

Automating Greybox System-Level Test Generation. - Denis Schwachhofer; Maik Betka; Steffen Becker 001; Stefan Wagner 001; Matthias Sauer 002; Ilia Polian (ETS, 2023)

LEDA: Locking Enabled Differential Analysis of Cryptographic Circuits. - Devanshi Upadhyaya; Maël Gay; Ilia Polian (HOST, 2023)

Exploring Gate-Diversity Enabled by Reconfigurable Memristive Technology. - Sebastian Brandhofer; Ziang Chen; Li-Wei Chen 001; Xianyue Zhao; Nan Du 004; Ilia Polian (ICECS, 2023)

Design Rationale for Symbiotically Secure Key Management Systems in IoT and Beyond. - Witali Bartsch; Prosanta Gope 001; Elif Bilge Kavun; Owen Millwood; Andriy Panchenko 001; Aryan Mohammadi Pasikhani; Ilia Polian (ICISSP, 2023)

Overview of Memristive Cryptography. - Ilia Polian; Nan Du 004; Werner Schindler (NEWCAS, 2023)

Optimal Qubit Reuse for Near-Term Quantum Computers. - Sebastian Brandhofer; Ilia Polian; Kevin Krsulich (QCE, 2023)

Power-balanced Memristive Cryptographic Implementation Against Side Channel Attacks. - Ziang Chen; Li-Wei Chen 001; Xianyue Zhao; Kefeng Li; Heidemarie Schmidt; Ilia Polian; Nan Du 004 (CoRR, 2023)

Benchmarking the performance of portfolio optimization with QAOA. - Sebastian Brandhofer; Daniel Braun 005; Vanessa Dehn; Gerhard Hellstern; Matthias Hüls; Yanjun Ji 001; Ilia Polian; Amandeep Singh Bhatia; Thomas Wellens (Quantum Inf. Process., 2023)

On Side-Channel Analysis of Memristive Cryptographic Circuits. - Li-Wei Chen 001; Ziang Chen; Werner Schindler; Xianyue Zhao; Heidemarie Schmidt; Nan Du 004; Ilia Polian (IEEE Trans. Inf. Forensics Secur., 2023)

Attacking a Joint Protection Scheme for Deep Neural Network Hardware Accelerators and Models. - Simon Wilhelmstätter; Joschua Conrad; Devanshi Upadhyaya; Ilia Polian; Maurits Ortmanns (AICAS, 2024)

Optimized Detection of Marginal Defects in Standard Cells Using Unsupervised Learning. - Karthik Pandaram; Hussam Amrouch; Ilia Polian (ATS, 2024)

Fault Tolerance in Stochastic Circuits for Recurrent Sequential Neural Networks. - Roshwin Sengupta; Ilia Polian; John P. Hayes (ATS, 2024)

Enabling Power Side-Channel Attack Simulation on Mixed-Signal Neural Network Accelerators. - Simon Wilhelmstätter; Joschua Conrad; Devanshi Upadhyaya; Ilia Polian; Maurits Ortmanns (COINS, 2024)

Performance and Error Tolerance of Stochastic Computing-Based Digital Filter Design. - Roshwin Sengupta; Ilia Polian; John P. Hayes (DDECS, 2024)

Large Language Model-Based Optimization for System-Level Test Program Generation. - Denis Schwachhofer; Peter Domanski; Steffen Becker 001; Stefan Wagner 001; Matthias Sauer 002; Dirk Pflüger; Ilia Polian (DFT, 2024)

Optimizing Waveform Accurate Fault Attacks Using Formal Methods. - Devanshi Upadhyaya; Ilia Polian (DFT, 2024)

Optimizing System-Level Test Program Generation via Genetic Programming. - Denis Schwachhofer; Francesco Angione; Steffen Becker 001; Stefan Wagner 001; Matthias Sauer 002; Paolo Bernardi; Ilia Polian (ETS, 2024)

Training Large Language Models for System-Level Test Program Generation Targeting Non-functional Properties. - Denis Schwachhofer; Peter Domanski; Steffen Becker 001; Stefan Wagner 001; Matthias Sauer 002; Dirk Pflüger; Ilia Polian (ETS, 2024)

Refinement and Empirical Side-Channel Analysis of Inner Product Masking with Robust Error Detection. - Anton Maidl; Maël Gay; Osnat Keren; Ilia Polian (IOLTS, 2024)

Scenario-based Test Content Optimization: Scan Test vs. System-Level Test. - Nourhan Elhamawy; Jens Anders; Ilia Polian; Matthias Sauer 002 (VTS, 2024)

Large Language Models to Generate System-Level Test Programs Targeting Non-functional Properties. - Denis Schwachhofer; Peter Domanski; Steffen Becker 001; Stefan Wagner 001; Matthias Sauer 002; Dirk Pflüger; Ilia Polian (CoRR, 2024)

Locking-Enabled Security Analysis of Cryptographic Circuits. - Devanshi Upadhyaya; Maël Gay; Ilia Polian (Cryptogr., 2024)

Synergistic Dynamical Decoupling and Circuit Design for Enhanced Algorithm Performance on Near-Term Quantum Devices. - Yanjun Ji 001; Ilia Polian (Entropy, 2024)

Memristive True Random Number Generator for Security Applications. - Xianyue Zhao; Li-Wei Chen 001; Kefeng Li; Heidemarie Schmidt; Ilia Polian; Nan Du 004 (Sensors, 2024)

Optimal Synthesis of Memristive Mixed-Mode Circuits. - Ilia Polian; Xianyue Zhao; Li-Wei Chen 001; Felix Bayhurst; Ziang Chen; Heidemarie Schmidt; Nan Du 004 (DATE, 2025)

Towards Understanding of System-Level Test Unique Fails. - Nourhan Elhamawy; Jens Anders; Ilia Polian; Matthias Sauer 002 (ETS, 2025)

Automated Test Equipment Drift Characterization Based on Gauge Repeatability and Reproducibility. - Anand Venkatachalam; Ernst Aderholz; Matthias Sauer 002; Simon Schweizer; Matthias Werner; Ilia Polian (ETS, 2025)

Multi Coefficient CPA on a Black Box Hardware Implementation of CRYSTALS-Kyber. - Tarick Welling; Maël Gay; Ilia Polian (ETS, 2025)

Motion Classification by Utilizing Machine Learning for Acceleration Data. - Kenzaburo Ishizu; Toshimitsu Honda; Kohei Miyase; Stefan Holst; Shudai Ishikawa; Roshwin Sengupta; Ilia Polian (ICCE, 2025)

Low-Power Continuous Wavelet Transform Employing Stochastic Computing. - Roshwin Sengupta; Ilia Polian; John P. Hayes (ISCAS, 2025)

1/2CcellV2DD? An Energy Model for Compute-in-Memory SRAM Cells. - Simon Wilhelmstätter; Joschua Conrad; Johannes Stark; Devanshi Upadhyaya; Maël Gay; Ilia Polian; Maurits Ortmanns (SMACD, 2025)