Architectures for block Toeplitz systems. - Ilias Bouras; George-Othon Glentis; Nicholas Kalouptsidis (Signal Process., 1996)

Performance comparison of driver architectures in submicron CMOS and BiCMOS technologies for low voltage operation. - Ioannis Moisiadis; Ilias Bouras; Constantin Papadas; Angela Arapoyanni (ICECS, 1999)

High performance level restoration circuits for low-power reduced-swing interconnect schemes. - Yiannis Moisiadis; Ilias Bouras; Angela Arapoyanni (ICECS, 2000)

A high speed low power CMOS clock driver using charge recycling technique. - Ilias Bouras; Yiannis Liaperdos; Angela Arapoyanni (ISCAS, 2000)

A CMOS charge pump for low voltage operation. - Yiannis Moisiadis; Ilias Bouras; Angela Arapoyanni (ISCAS, 2000)

A CMOS differential logic for low-power and high-speed applications. - Yiannis Moisiadis; Ilias Bouras; Angela Arapoyanni (ISCAS (4), 2001)

A high-performance low-power static differential double edge-triggered flip-flop. - Yiannis Moisiadis; Ilias Bouras; Angela Arapoyanni; Lampros Dermentzoglou (ISCAS (4), 2001)

Charge Pump Circuits for Low-voltage Applications. - Yiannis Moisiadis; Ilias Bouras; Angela Arapoyanni (VLSI Design, 2002)

A single-chip, 5.15GHz-5.35GHz, 2.4GHz-2.5GHz, 0.18μm CMOS RF transceiver for 802.11a/b/g wireless LAN. - Kostis Vavelidis; Iason Vassiliou; Theodore Georgantas; Akira Yamanaka; Spyros Kavadias; George Kamoulakos; Charalampos Kapnistis; Yiannis Kokolakis; Aris Kyranas; Panagiotis Merakos; Ilias Bouras; Stamatis Bouras; et al. (ESSCIRC, 2003)

A single-chip digitally calibrated 5.15-5.825-GHz 0.18-μm CMOS transceiver for 802.11a wireless LAN. - Iason Vassiliou; Kostis Vavelidis; Theodore Georgantas; Sofoklis Plevridis; Nikos Haralabidis; George Kamoulakos; Charalambos Kapnistis; Spyros Kavadias; Yiannis Kokolakis; Panagiotis Merakos; Jacques C. Rudell; Akira Yamanaka; et al. (IEEE J. Solid State Circuits, 2003)

A cost-efficient 0.18 μm CMOS RF transceiver using a fractional-N synthesizer for 802.11b/g wireless LAN applications. - Nikos Haralabidis; Kostis Vavelidis; Iason Vassiliou; Theodore Georgantas; Akira Yamanaka; Spyros Kavadias; George Kamoulakos; Charalampos Kapnistis; Yiannis Kokolakis; Aris Kyranas; Panagiotis Merakos; Ilias Bouras; et al. (CICC, 2004)

A dual-band 5.15-5.35-GHz, 2.4-2.5-GHz 0.18-μm CMOS transceiver for 802.11a/b/g wireless LAN. - Kostis Vavelidis; Iason Vassiliou; Theodore Georgantas; Akira Yamanaka; Spyros Kavadias; George Kamoulakos; Charalampos Kapnistis; Yiannis Kokolakis; Aris Kyranas; Panagiotis Merakos; Ilias Bouras; Stamatis Bouras; et al. (IEEE J. Solid State Circuits, 2004)